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| author | Tom Stellard <thomas.stellard@amd.com> | 2014-01-22 19:24:21 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2014-01-22 19:24:21 +0000 |
| commit | 9c3e0ede1d86adfe8d2862ecbf21f189a5c18d5c (patch) | |
| tree | 2e18b96472dab9ff4e5d40e915de96d1a0ca3516 /test | |
| parent | 655ba251b50346262bee125d6fb29bb086a883d2 (diff) | |
| download | llvm-9c3e0ede1d86adfe8d2862ecbf21f189a5c18d5c.tar.gz llvm-9c3e0ede1d86adfe8d2862ecbf21f189a5c18d5c.tar.bz2 llvm-9c3e0ede1d86adfe8d2862ecbf21f189a5c18d5c.tar.xz | |
R600: Add support for global addresses with constant initializers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199825 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/R600/gv-const-addrspace.ll | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/test/CodeGen/R600/gv-const-addrspace.ll b/test/CodeGen/R600/gv-const-addrspace.ll new file mode 100644 index 0000000000..cda7ab1fcc --- /dev/null +++ b/test/CodeGen/R600/gv-const-addrspace.ll @@ -0,0 +1,41 @@ +; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600 --check-prefix=FUNC + +; XXX: Test on SI once 64-bit adds are supportes. + +@float_gv = internal addrspace(2) unnamed_addr constant [5 x float] [float 0.0, float 1.0, float 2.0, float 3.0, float 4.0], align 4 + +; FUNC-LABEL: @float + +; R600-DAG: MOV {{\** *}}T2.X +; R600-DAG: MOV {{\** *}}T3.X +; R600-DAG: MOV {{\** *}}T4.X +; R600-DAG: MOV {{\** *}}T5.X +; R600-DAG: MOV {{\** *}}T6.X +; R600: MOVA_INT + +define void @float(float addrspace(1)* %out, i32 %index) { +entry: + %0 = getelementptr inbounds [5 x float] addrspace(2)* @float_gv, i32 0, i32 %index + %1 = load float addrspace(2)* %0 + store float %1, float addrspace(1)* %out + ret void +} + +@i32_gv = internal addrspace(2) unnamed_addr constant [5 x i32] [i32 0, i32 1, i32 2, i32 3, i32 4], align 4 + +; FUNC-LABEL: @i32 + +; R600-DAG: MOV {{\** *}}T2.X +; R600-DAG: MOV {{\** *}}T3.X +; R600-DAG: MOV {{\** *}}T4.X +; R600-DAG: MOV {{\** *}}T5.X +; R600-DAG: MOV {{\** *}}T6.X +; R600: MOVA_INT + +define void @i32(i32 addrspace(1)* %out, i32 %index) { +entry: + %0 = getelementptr inbounds [5 x i32] addrspace(2)* @i32_gv, i32 0, i32 %index + %1 = load i32 addrspace(2)* %0 + store i32 %1, i32 addrspace(1)* %out + ret void +} |