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| author | Joey Gouly <joey.gouly@arm.com> | 2013-07-09 09:59:04 +0000 |
|---|---|---|
| committer | Joey Gouly <joey.gouly@arm.com> | 2013-07-09 09:59:04 +0000 |
| commit | 9fb5a6588becc92be1d7cf503d2947b170be3c31 (patch) | |
| tree | d751e10e5dc26853de20e50d9cc6bccd4d251024 /test | |
| parent | 2e015ef9bb40e5d9f98db9a9509b9986873089ea (diff) | |
| download | llvm-9fb5a6588becc92be1d7cf503d2947b170be3c31.tar.gz llvm-9fb5a6588becc92be1d7cf503d2947b170be3c31.tar.bz2 llvm-9fb5a6588becc92be1d7cf503d2947b170be3c31.tar.xz | |
Add MC assembly/disassembly support for VCVT{A, N, P, M} to V8FP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185922 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/MC/ARM/v8fp.s | 38 | ||||
| -rw-r--r-- | test/MC/Disassembler/ARM/v8fp.txt | 49 |
2 files changed, 87 insertions, 0 deletions
diff --git a/test/MC/ARM/v8fp.s b/test/MC/ARM/v8fp.s index 05a7f1badd..36cec8b987 100644 --- a/test/MC/ARM/v8fp.s +++ b/test/MC/ARM/v8fp.s @@ -22,6 +22,44 @@ vcvtblt.f16.f64 s4, d1 @ CHECK: vcvtblt.f16.f64 s4, d1 @ encoding: [0x41,0x2b,0xb3,0xbe] + +@ VCVT{A,N,P,M} + + vcvta.s32.f32 s2, s3 +@ CHECK: vcvta.s32.f32 s2, s3 @ encoding: [0xe1,0x1a,0xbc,0xfe] + vcvta.s32.f64 s2, d3 +@ CHECK: vcvta.s32.f64 s2, d3 @ encoding: [0xc3,0x1b,0xbc,0xfe] + vcvtn.s32.f32 s6, s23 +@ CHECK: vcvtn.s32.f32 s6, s23 @ encoding: [0xeb,0x3a,0xbd,0xfe] + vcvtn.s32.f64 s6, d23 +@ CHECK: vcvtn.s32.f64 s6, d23 @ encoding: [0xe7,0x3b,0xbd,0xfe] + vcvtp.s32.f32 s0, s4 +@ CHECK: vcvtp.s32.f32 s0, s4 @ encoding: [0xc2,0x0a,0xbe,0xfe] + vcvtp.s32.f64 s0, d4 +@ CHECK: vcvtp.s32.f64 s0, d4 @ encoding: [0xc4,0x0b,0xbe,0xfe] + vcvtm.s32.f32 s17, s8 +@ CHECK: vcvtm.s32.f32 s17, s8 @ encoding: [0xc4,0x8a,0xff,0xfe] + vcvtm.s32.f64 s17, d8 +@ CHECK: vcvtm.s32.f64 s17, d8 @ encoding: [0xc8,0x8b,0xff,0xfe] + + vcvta.u32.f32 s2, s3 +@ CHECK: vcvta.u32.f32 s2, s3 @ encoding: [0x61,0x1a,0xbc,0xfe] + vcvta.u32.f64 s2, d3 +@ CHECK: vcvta.u32.f64 s2, d3 @ encoding: [0x43,0x1b,0xbc,0xfe] + vcvtn.u32.f32 s6, s23 +@ CHECK: vcvtn.u32.f32 s6, s23 @ encoding: [0x6b,0x3a,0xbd,0xfe] + vcvtn.u32.f64 s6, d23 +@ CHECK: vcvtn.u32.f64 s6, d23 @ encoding: [0x67,0x3b,0xbd,0xfe] + vcvtp.u32.f32 s0, s4 +@ CHECK: vcvtp.u32.f32 s0, s4 @ encoding: [0x42,0x0a,0xbe,0xfe] + vcvtp.u32.f64 s0, d4 +@ CHECK: vcvtp.u32.f64 s0, d4 @ encoding: [0x44,0x0b,0xbe,0xfe] + vcvtm.u32.f32 s17, s8 +@ CHECK: vcvtm.u32.f32 s17, s8 @ encoding: [0x44,0x8a,0xff,0xfe] + vcvtm.u32.f64 s17, d8 +@ CHECK: vcvtm.u32.f64 s17, d8 @ encoding: [0x48,0x8b,0xff,0xfe] + + @ VSEL vselge.f32 s4, s1, s23 @ CHECK: vselge.f32 s4, s1, s23 @ encoding: [0xab,0x2a,0x20,0xfe] diff --git a/test/MC/Disassembler/ARM/v8fp.txt b/test/MC/Disassembler/ARM/v8fp.txt index a805f81768..9c9d47058a 100644 --- a/test/MC/Disassembler/ARM/v8fp.txt +++ b/test/MC/Disassembler/ARM/v8fp.txt @@ -25,6 +25,55 @@ # CHECK: vcvtblt.f16.f64 s4, d1 +0xe1 0x1a 0xbc 0xfe +# CHECK: vcvta.s32.f32 s2, s3 + +0xc3 0x1b 0xbc 0xfe +# CHECK: vcvta.s32.f64 s2, d3 + +0xeb 0x3a 0xbd 0xfe +# CHECK: vcvtn.s32.f32 s6, s23 + +0xe7 0x3b 0xbd 0xfe +# CHECK: vcvtn.s32.f64 s6, d23 + +0xc2 0x0a 0xbe 0xfe +# CHECK: vcvtp.s32.f32 s0, s4 + +0xc4 0x0b 0xbe 0xfe +# CHECK: vcvtp.s32.f64 s0, d4 + +0xc4 0x8a 0xff 0xfe +# CHECK: vcvtm.s32.f32 s17, s8 + +0xc8 0x8b 0xff 0xfe +# CHECK: vcvtm.s32.f64 s17, d8 + +0x61 0x1a 0xbc 0xfe +# CHECK: vcvta.u32.f32 s2, s3 + +0x43 0x1b 0xbc 0xfe +# CHECK: vcvta.u32.f64 s2, d3 + +0x6b 0x3a 0xbd 0xfe +# CHECK: vcvtn.u32.f32 s6, s23 + +0x67 0x3b 0xbd 0xfe +# CHECK: vcvtn.u32.f64 s6, d23 + +0x42 0x0a 0xbe 0xfe +# CHECK: vcvtp.u32.f32 s0, s4 + +0x44 0x0b 0xbe 0xfe +# CHECK: vcvtp.u32.f64 s0, d4 + +0x44 0x8a 0xff 0xfe +# CHECK: vcvtm.u32.f32 s17, s8 + +0x48 0x8b 0xff 0xfe +# CHECK: vcvtm.u32.f64 s17, d8 + + 0xab 0x2a 0x20 0xfe # CHECK: vselge.f32 s4, s1, s23 |