diff options
| author | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2011-02-14 13:09:44 +0000 |
|---|---|---|
| committer | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2011-02-14 13:09:44 +0000 |
| commit | a2b6e4151b75248f9dbf8067186cba673520f8f4 (patch) | |
| tree | c4aaaa817865ec6d4759a038002da3ec84e11ec2 /test | |
| parent | 283c8caccd093f8e1d4f0bdd01ac240b4edbd20a (diff) | |
| download | llvm-a2b6e4151b75248f9dbf8067186cba673520f8f4.tar.gz llvm-a2b6e4151b75248f9dbf8067186cba673520f8f4.tar.bz2 llvm-a2b6e4151b75248f9dbf8067186cba673520f8f4.tar.xz | |
Fix encoding and add parsing support for the arm/thumb CPS instruction:
- Add custom operand matching for imod and iflags.
- Rename SplitMnemonicAndCC to SplitMnemonic since it splits more than CC
from mnemonic.
- While adding ".w" as an operand, don't change "Head" to avoid passing the
wrong mnemonic to ParseOperand.
- Add asm parser tests.
- Add disassembler tests just to make sure it can catch all cps versions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125489 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/MC/ARM/arm_instructions.s | 9 | ||||
| -rw-r--r-- | test/MC/ARM/thumb.s | 3 | ||||
| -rw-r--r-- | test/MC/ARM/thumb2.s | 7 | ||||
| -rw-r--r-- | test/MC/Disassembler/ARM/arm-tests.txt | 9 | ||||
| -rw-r--r-- | test/MC/Disassembler/ARM/thumb-tests.txt | 12 |
5 files changed, 40 insertions, 0 deletions
diff --git a/test/MC/ARM/arm_instructions.s b/test/MC/ARM/arm_instructions.s index f5bf236ab2..291a76131c 100644 --- a/test/MC/ARM/arm_instructions.s +++ b/test/MC/ARM/arm_instructions.s @@ -237,3 +237,12 @@ @ CHECK: dsb oshst @ encoding: [0x42,0xf0,0x7f,0xf5] dsb oshst +@ CHECK: cpsie aif @ encoding: [0xc0,0x01,0x08,0xf1] + cpsie aif + +@ CHECK: cps #15 @ encoding: [0x0f,0x00,0x02,0xf1] + cps #15 + +@ CHECK: cpsie if, #10 @ encoding: [0xca,0x00,0x0a,0xf1] + cpsie if, #10 + diff --git a/test/MC/ARM/thumb.s b/test/MC/ARM/thumb.s index 5d284c31fe..342a390d81 100644 --- a/test/MC/ARM/thumb.s +++ b/test/MC/ARM/thumb.s @@ -65,3 +65,6 @@ @ CHECK: wfi @ encoding: [0x30,0xbf] wfi + +@ CHECK: cpsie aif @ encoding: [0x67,0xb6] + cpsie aif diff --git a/test/MC/ARM/thumb2.s b/test/MC/ARM/thumb2.s index b8b068fd90..be4e555dc4 100644 --- a/test/MC/ARM/thumb2.s +++ b/test/MC/ARM/thumb2.s @@ -252,3 +252,10 @@ @ CHECK: dsb oshst @ encoding: [0xbf,0xf3,0x42,0x8f] dsb oshst +@ CHECK: cpsie.w aif @ encoding: [0xaf,0xf3,0xe0,0x84] + cpsie.w aif +@ CHECK: cps #15 @ encoding: [0xaf,0xf3,0x0f,0x81] + cps #15 +@ CHECK: cpsie.w if, #10 @ encoding: [0xaf,0xf3,0x6a,0x85] + cpsie.w if, #10 + diff --git a/test/MC/Disassembler/ARM/arm-tests.txt b/test/MC/Disassembler/ARM/arm-tests.txt index 07d349fc3b..26bd182d78 100644 --- a/test/MC/Disassembler/ARM/arm-tests.txt +++ b/test/MC/Disassembler/ARM/arm-tests.txt @@ -118,3 +118,12 @@ # CHECK: setend le 0x00 0x00 0x01 0xf1 + +# CHECK: cpsie aif +0xc0 0x01 0x08 0xf1 + +# CHECK: cps #15 +0x0f 0x00 0x02 0xf1 + +# CHECK: cpsie if, #10 +0xca 0x00 0x0a 0xf1 diff --git a/test/MC/Disassembler/ARM/thumb-tests.txt b/test/MC/Disassembler/ARM/thumb-tests.txt index 29c67e7a03..4e8bc9baa2 100644 --- a/test/MC/Disassembler/ARM/thumb-tests.txt +++ b/test/MC/Disassembler/ARM/thumb-tests.txt @@ -103,3 +103,15 @@ # IT block end # CHECK: rsbs r1, r2, #0 0x51 0x42 + +# CHECK: cpsid.w f +0xaf 0xf3 0x20 0x86 + +# CHECK: cps #15 +0xaf 0xf3 0x0f 0x81 + +# CHECK: cpsie.w if, #10 +0xaf 0xf3 0x6a 0x85 + +# CHECK: cpsie aif +0x67 0xb6 |