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| author | Dale Johannesen <dalej@apple.com> | 2010-06-28 22:09:45 +0000 |
|---|---|---|
| committer | Dale Johannesen <dalej@apple.com> | 2010-06-28 22:09:45 +0000 |
| commit | a5989f8e222f6e2ad67704d7e8cc67c86c4d0697 (patch) | |
| tree | 07d5d7aa1e55a7e310067c111ffcf5e4b144f638 /test | |
| parent | f187ac5a23213f85c3c1f0f80b3592295ee6441d (diff) | |
| download | llvm-a5989f8e222f6e2ad67704d7e8cc67c86c4d0697.tar.gz llvm-a5989f8e222f6e2ad67704d7e8cc67c86c4d0697.tar.bz2 llvm-a5989f8e222f6e2ad67704d7e8cc67c86c4d0697.tar.xz | |
In asm's, output operands with matching input constraints
have to be registers, per gcc documentation. This affects
the logic for determining what "g" should lower to. PR 7393.
A couple of existing testcases are affected.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107079 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/X86/2008-09-18-inline-asm-2.ll | 4 | ||||
| -rw-r--r-- | test/CodeGen/X86/2010-06-28-matched-g-constraint.ll | 11 | ||||
| -rw-r--r-- | test/FrontendC/2010-06-17-asmcrash.c | 2 |
3 files changed, 14 insertions, 3 deletions
diff --git a/test/CodeGen/X86/2008-09-18-inline-asm-2.ll b/test/CodeGen/X86/2008-09-18-inline-asm-2.ll index 9421ae5176..eadfda0394 100644 --- a/test/CodeGen/X86/2008-09-18-inline-asm-2.ll +++ b/test/CodeGen/X86/2008-09-18-inline-asm-2.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 | grep "#%ebp %esi %edi 8(%edx) %eax (%ebx)" -; RUN: llc < %s -march=x86 -regalloc=fast | grep "#%edi %ebx %edx 8(%ebp) %eax (%esi)" +; RUN: llc < %s -march=x86 | grep "#%ebp %edi %ebx 8(%esi) %eax %dl" +; RUN: llc < %s -march=x86 -regalloc=fast | grep "#%ebx %esi %edi 8(%ebp) %eax %dl" ; The 1st, 2nd, 3rd and 5th registers above must all be different. The registers ; referenced in the 4th and 6th operands must not be the same as the 1st or 5th diff --git a/test/CodeGen/X86/2010-06-28-matched-g-constraint.ll b/test/CodeGen/X86/2010-06-28-matched-g-constraint.ll new file mode 100644 index 0000000000..82dac9d993 --- /dev/null +++ b/test/CodeGen/X86/2010-06-28-matched-g-constraint.ll @@ -0,0 +1,11 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin11 | FileCheck %s +; Any register is OK for %0, but it must be a register, not memory. + +define i32 @foo() nounwind ssp { +entry: +; CHECK: GCROOT %eax + %_r = alloca i32, align 4 ; <i32*> [#uses=2] + call void asm "/* GCROOT $0 */", "=*imr,0,~{dirflag},~{fpsr},~{flags}"(i32* %_r, i32 4) nounwind + %0 = load i32* %_r, align 4 ; <i32> [#uses=1] + ret i32 %0 +} diff --git a/test/FrontendC/2010-06-17-asmcrash.c b/test/FrontendC/2010-06-17-asmcrash.c index c477e165f5..5063054fd4 100644 --- a/test/FrontendC/2010-06-17-asmcrash.c +++ b/test/FrontendC/2010-06-17-asmcrash.c @@ -12,5 +12,5 @@ void avg_pixels8_mmx2(uint8_t *block, const uint8_t *pixels, int line_size, int :"+g"(h), "+S"(pixels), "+D"(block) :"r" ((x86_reg)line_size) :"%""rax", "memory"); -// CHECK: # (%rsp) %rsi %rdi %rcx +// CHECK: # %ecx %rsi %rdi %rdx } |