summaryrefslogtreecommitdiff
path: root/test
diff options
context:
space:
mode:
authorAdhemerval Zanella <azanella@linux.vnet.ibm.com>2012-10-25 12:27:42 +0000
committerAdhemerval Zanella <azanella@linux.vnet.ibm.com>2012-10-25 12:27:42 +0000
commitaa71428378c1cb491ca60041d8ba7aa110bc963d (patch)
tree908897b170bef9bf01d423f2c18bca9ec90be162 /test
parentc0cd72204d35bedbd2a36b240d9e5e95647fd2d2 (diff)
downloadllvm-aa71428378c1cb491ca60041d8ba7aa110bc963d.tar.gz
llvm-aa71428378c1cb491ca60041d8ba7aa110bc963d.tar.bz2
llvm-aa71428378c1cb491ca60041d8ba7aa110bc963d.tar.xz
Initial TOC support for PowerPC64 object creation
This patch adds initial PPC64 TOC MC object creation using the small mcmodel (a single 64K TOC) adding the some TOC relocations (R_PPC64_TOC, R_PPC64_TOC16, and R_PPC64_TOC16DS). The addition of 'undefinedExplicitRelSym' hook on 'MCELFObjectTargetWriter' is meant to avoid the creation of an unreferenced ".TOC." symbol (used in the .odp creation) as well to set the R_PPC64_TOC relocation target as the temporary ".TOC." symbol. On PPC64 ABI, the R_PPC64_TOC relocation should not point to any symbol. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166677 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r--test/MC/PowerPC/lit.local.cfg5
-rw-r--r--test/MC/PowerPC/ppc64-relocs-01.ll66
2 files changed, 71 insertions, 0 deletions
diff --git a/test/MC/PowerPC/lit.local.cfg b/test/MC/PowerPC/lit.local.cfg
new file mode 100644
index 0000000000..88488cdd04
--- /dev/null
+++ b/test/MC/PowerPC/lit.local.cfg
@@ -0,0 +1,5 @@
+config.suffixes = ['.ll', '.c', '.cpp', '.s']
+
+targets = set(config.root.targets_to_build.split())
+if not 'PowerPC' in targets:
+ config.unsupported = True
diff --git a/test/MC/PowerPC/ppc64-relocs-01.ll b/test/MC/PowerPC/ppc64-relocs-01.ll
new file mode 100644
index 0000000000..5996af84f4
--- /dev/null
+++ b/test/MC/PowerPC/ppc64-relocs-01.ll
@@ -0,0 +1,66 @@
+;; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -O3 \
+;; RUN: -filetype=obj %s -o - | \
+;; RUN: elf-dump --dump-section-data | FileCheck %s
+
+;; FIXME: this file need to be in .s form, change when asm parse is done.
+
+@number64 = global i64 10, align 8
+
+define i64 @access_int64(i64 %a) nounwind readonly {
+entry:
+ %0 = load i64* @number64, align 8
+ %cmp = icmp eq i64 %0, %a
+ %conv1 = zext i1 %cmp to i64
+ ret i64 %conv1
+}
+
+declare double @sin(double) nounwind
+
+define double @test_branch24 (double %x) nounwind readonly {
+entry:
+ %add = call double @sin(double %x) nounwind
+ ret double %add
+}
+
+;; The relocations in .rela.text are the 'number64' load using a
+;; R_PPC64_TOC16_DS against the .toc and the 'sin' external function
+;; address using a R_PPC64_REL24
+;; CHECK: '.rela.text'
+;; CHECK: Relocation 0
+;; CHECK-NEXT: 'r_offset',
+;; CHECK-NEXT: 'r_sym', 0x00000006
+;; CHECK-NEXT: 'r_type', 0x0000003f
+;; CHECK: Relocation 1
+;; CHECK-NEXT: 'r_offset',
+;; CHECK-NEXT: 'r_sym', 0x0000000a
+;; CHECK-NEXT: 'r_type', 0x0000000a
+
+;; The .opd entry for the 'access_int64' function creates 2 relocations:
+;; 1. A R_PPC64_ADDR64 against the .text segment plus addend (the function
+; address itself);
+;; 2. And a R_PPC64_TOC against no symbol (the linker will replace for the
+;; module's TOC base).
+;; CHECK: '.rela.opd'
+;; CHECK: Relocation 0
+;; CHECK-NEXT: 'r_offset',
+;; CHECK-NEXT: 'r_sym', 0x00000002
+;; CHECK-NEXT: 'r_type', 0x00000026
+;; CHECK: Relocation 1
+;; CHECK-NEXT: 'r_offset',
+;; CHECK-NEXT: 'r_sym', 0x00000000
+;; CHECK-NEXT: 'r_type', 0x00000033
+
+;; Finally the TOC creates the relocation for the 'number64'.
+;; CHECK: '.rela.toc'
+;; CHECK: Relocation 0
+;; CHECK-NEXT: 'r_offset',
+;; CHECK-NEXT: 'r_sym', 0x00000008
+;; CHECK-NEXT: 'r_type', 0x00000026
+
+;; Check if the relocation references are for correct symbols.
+;; CHECK: Symbol 7
+;; CHECK-NEXT: 'access_int64'
+;; CHECK: Symbol 8
+;; CHECK-NEXT: 'number64'
+;; CHECK: Symbol 10
+;; CHECK-NEXT: 'sin'