diff options
author | Hal Finkel <hfinkel@anl.gov> | 2014-04-13 23:02:40 +0000 |
---|---|---|
committer | Hal Finkel <hfinkel@anl.gov> | 2014-04-13 23:02:40 +0000 |
commit | b9ed50cf1772205b5a8f3ce2b604d01f9335e360 (patch) | |
tree | 17d3c2f17dd1a6fad300c04a50827e71dd15bdbd /test | |
parent | a94a6829c145658c8afb717285206aea81a83c5f (diff) | |
download | llvm-b9ed50cf1772205b5a8f3ce2b604d01f9335e360.tar.gz llvm-b9ed50cf1772205b5a8f3ce2b604d01f9335e360.tar.bz2 llvm-b9ed50cf1772205b5a8f3ce2b604d01f9335e360.tar.xz |
[PowerPC] [Constant Hoisting] Enable constant hoisting on PPC
Implements the various TTI functions to enable constant hoisting on PPC. The
only significant test-suite change is this:
MultiSource/Benchmarks/VersaBench/bmm/bmm - 20% speedup
(which essentially reverses the slowdown from r206120).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206141 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r-- | test/Transforms/ConstantHoisting/PowerPC/const-base-addr.ll | 23 | ||||
-rw-r--r-- | test/Transforms/ConstantHoisting/PowerPC/lit.local.cfg | 4 | ||||
-rw-r--r-- | test/Transforms/ConstantHoisting/PowerPC/masks.ll | 66 |
3 files changed, 93 insertions, 0 deletions
diff --git a/test/Transforms/ConstantHoisting/PowerPC/const-base-addr.ll b/test/Transforms/ConstantHoisting/PowerPC/const-base-addr.ll new file mode 100644 index 0000000000..b4337eeda6 --- /dev/null +++ b/test/Transforms/ConstantHoisting/PowerPC/const-base-addr.ll @@ -0,0 +1,23 @@ +; RUN: opt -S -consthoist < %s | FileCheck %s +target datalayout = "E-m:e-i64:64-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +%T = type { i32, i32, i32, i32 } + +; Test if even cheap base addresses are hoisted. +define i32 @test1() nounwind { +; CHECK-LABEL: @test1 +; CHECK: %const = bitcast i32 12345678 to i32 +; CHECK: %1 = inttoptr i32 %const to %T* +; CHECK: %addr1 = getelementptr %T* %1, i32 0, i32 1 + %addr1 = getelementptr %T* inttoptr (i32 12345678 to %T*), i32 0, i32 1 + %tmp1 = load i32* %addr1 + %addr2 = getelementptr %T* inttoptr (i32 12345678 to %T*), i32 0, i32 2 + %tmp2 = load i32* %addr2 + %addr3 = getelementptr %T* inttoptr (i32 12345678 to %T*), i32 0, i32 3 + %tmp3 = load i32* %addr3 + %tmp4 = add i32 %tmp1, %tmp2 + %tmp5 = add i32 %tmp3, %tmp4 + ret i32 %tmp5 +} + diff --git a/test/Transforms/ConstantHoisting/PowerPC/lit.local.cfg b/test/Transforms/ConstantHoisting/PowerPC/lit.local.cfg new file mode 100644 index 0000000000..2e46300558 --- /dev/null +++ b/test/Transforms/ConstantHoisting/PowerPC/lit.local.cfg @@ -0,0 +1,4 @@ +targets = set(config.root.targets_to_build.split()) +if not 'PowerPC' in targets: + config.unsupported = True + diff --git a/test/Transforms/ConstantHoisting/PowerPC/masks.ll b/test/Transforms/ConstantHoisting/PowerPC/masks.ll new file mode 100644 index 0000000000..d553182011 --- /dev/null +++ b/test/Transforms/ConstantHoisting/PowerPC/masks.ll @@ -0,0 +1,66 @@ +; RUN: opt -S -consthoist < %s | FileCheck %s +target datalayout = "E-m:e-i64:64-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +; Here the masks are all contiguous, and should not be hoisted. +define i32 @test1() nounwind { +entry: +; CHECK-LABEL: @test1 +; CHECK-NOT: bitcast i32 65535 to i32 +; CHECK: and i32 undef, 65535 + %conv121 = and i32 undef, 65535 + br i1 undef, label %if.then152, label %if.end167 + +if.then152: +; CHECK: and i32 undef, 65535 + %conv153 = and i32 undef, 65535 + br i1 undef, label %if.end167, label %end2 + +if.end167: +; CHECK: and i32 {{.*}}, 32768 + %shl161 = shl nuw nsw i32 %conv121, 15 + %0 = load i8* undef, align 1 + %conv169 = zext i8 %0 to i32 + %shl170 = shl nuw nsw i32 %conv169, 7 + %shl161.masked = and i32 %shl161, 32768 + %conv174 = or i32 %shl170, %shl161.masked + %cmp178 = icmp ugt i32 %conv174, 32767 + br i1 %cmp178, label %end1, label %end2 + +end1: + unreachable + +end2: + unreachable +} + +; Here the masks are not contiguous, and should be hoisted. +define i32 @test2() nounwind { +entry: +; CHECK-LABEL: @test2 +; CHECK: bitcast i32 65531 to i32 + %conv121 = and i32 undef, 65531 + br i1 undef, label %if.then152, label %if.end167 + +if.then152: + %conv153 = and i32 undef, 65531 + br i1 undef, label %if.end167, label %end2 + +if.end167: +; CHECK: add i32 {{.*}}, -32758 + %shl161 = shl nuw nsw i32 %conv121, 15 + %0 = load i8* undef, align 1 + %conv169 = zext i8 %0 to i32 + %shl170 = shl nuw nsw i32 %conv169, 7 + %shl161.masked = and i32 %shl161, 32773 + %conv174 = or i32 %shl170, %shl161.masked + %cmp178 = icmp ugt i32 %conv174, 32767 + br i1 %cmp178, label %end1, label %end2 + +end1: + unreachable + +end2: + unreachable +} + |