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author | Nadav Rotem <nadav.rotem@intel.com> | 2011-11-09 13:21:28 +0000 |
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committer | Nadav Rotem <nadav.rotem@intel.com> | 2011-11-09 13:21:28 +0000 |
commit | bb539bf973bb861ffe8179ac8791fad19448cd52 (patch) | |
tree | 46e1b376a2c37979b60e83eb6e614823d82bb5f0 /test | |
parent | 2dd423987eafaa1d0bc5d0312283e24e60eeb2b5 (diff) | |
download | llvm-bb539bf973bb861ffe8179ac8791fad19448cd52.tar.gz llvm-bb539bf973bb861ffe8179ac8791fad19448cd52.tar.bz2 llvm-bb539bf973bb861ffe8179ac8791fad19448cd52.tar.xz |
Add AVX2 support for vselect of v32i8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144187 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r-- | test/CodeGen/X86/avx2-logic.ll | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/test/CodeGen/X86/avx2-logic.ll b/test/CodeGen/X86/avx2-logic.ll index a763bc0010..944849cf4f 100644 --- a/test/CodeGen/X86/avx2-logic.ll +++ b/test/CodeGen/X86/avx2-logic.ll @@ -1,6 +1,8 @@ ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core-avx2 -mattr=+avx2 | FileCheck %s +; CHECK: vpandn ; CHECK: vpandn %ymm +; CHECK: ret define <4 x i64> @vpandn(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp { entry: ; Force the execution domain with an add. @@ -10,7 +12,9 @@ entry: ret <4 x i64> %x } +; CHECK: vpand ; CHECK: vpand %ymm +; CHECK: ret define <4 x i64> @vpand(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp { entry: ; Force the execution domain with an add. @@ -19,7 +23,9 @@ entry: ret <4 x i64> %x } +; CHECK: vpor ; CHECK: vpor %ymm +; CHECK: ret define <4 x i64> @vpor(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp { entry: ; Force the execution domain with an add. @@ -28,7 +34,9 @@ entry: ret <4 x i64> %x } +; CHECK: vpxor ; CHECK: vpxor %ymm +; CHECK: ret define <4 x i64> @vpxor(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp { entry: ; Force the execution domain with an add. @@ -36,3 +44,14 @@ entry: %x = xor <4 x i64> %a2, %b ret <4 x i64> %x } + + + +; CHECK: vpblendvb +; CHECK: vpblendvb %ymm +; CHECK: ret +define <32 x i8> @vpblendvb(<32 x i8> %x, <32 x i8> %y) { + %min_is_x = icmp ult <32 x i8> %x, %y + %min = select <32 x i1> %min_is_x, <32 x i8> %x, <32 x i8> %y + ret <32 x i8> %min +} |