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| author | Dan Gohman <gohman@apple.com> | 2010-02-24 22:05:23 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2010-02-24 22:05:23 +0000 |
| commit | c382bc3c0f476bf94303d9892af4e2cee173bfe5 (patch) | |
| tree | 177ed972f2efd65c0f0296b1899e97042128a4cb /test | |
| parent | 46ca5efdd5b748ba8aa62168f7753cb46b683bc5 (diff) | |
| download | llvm-c382bc3c0f476bf94303d9892af4e2cee173bfe5.tar.gz llvm-c382bc3c0f476bf94303d9892af4e2cee173bfe5.tar.bz2 llvm-c382bc3c0f476bf94303d9892af4e2cee173bfe5.tar.xz | |
Make getTypeSizeInBits work correctly for array types; it should return
the number of value bits, not the number of bits of allocation for in-memory
storage.
Make getTypeStoreSize and getTypeAllocSize work consistently for arrays and
vectors.
Fix several places in CodeGen which compute offsets into in-memory vectors
to use TargetData information.
This fixes PR1784.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97064 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/X86/vector-of-i1.ll | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/test/CodeGen/X86/vector-of-i1.ll b/test/CodeGen/X86/vector-of-i1.ll new file mode 100644 index 0000000000..7bbcf8ded7 --- /dev/null +++ b/test/CodeGen/X86/vector-of-i1.ll @@ -0,0 +1,39 @@ +; RUN: llc < %s -march=x86-64 | FileCheck %s + +; Vectors of i1 are stored with each element having a +; different address. Since the address unit on x86 is 8 bits, +; that means each i1 value takes 8 bits of storage. + +; CHECK: store: +; CHECK: movb $1, 7(%rdi) +; CHECK: movb $1, 6(%rdi) +; CHECK: movb $0, 5(%rdi) +; CHECK: movb $0, 4(%rdi) +; CHECK: movb $1, 3(%rdi) +; CHECK: movb $0, 2(%rdi) +; CHECK: movb $1, 1(%rdi) +; CHECK: movb $0, (%rdi) +define void @store(<8 x i1>* %p) nounwind { + store <8 x i1> <i1 0, i1 1, i1 0, i1 1, i1 0, i1 0, i1 1, i1 1>, <8 x i1>* %p + ret void +} + +; CHECK: variable_extract: +; CHECK: movb 7(%rdi), +; CHECK: movb 6(%rdi), +; CHECK: movb 5(%rdi), +define i32 @variable_extract(<8 x i1>* %p, i32 %n) nounwind { + %t = load <8 x i1>* %p + %s = extractelement <8 x i1> %t, i32 %n + %e = zext i1 %s to i32 + ret i32 %e +} + +; CHECK: constant_extract: +; CHECK: movzbl 3(%rdi), %eax +define i32 @constant_extract(<8 x i1>* %p, i32 %n) nounwind { + %t = load <8 x i1>* %p + %s = extractelement <8 x i1> %t, i32 3 + %e = zext i1 %s to i32 + ret i32 %e +} |