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| author | Petar Jovanovic <petar.jovanovic@imgtec.com> | 2014-02-05 17:19:30 +0000 |
|---|---|---|
| committer | Petar Jovanovic <petar.jovanovic@imgtec.com> | 2014-02-05 17:19:30 +0000 |
| commit | d1dc9a0af04cc136124e81509dff1e27151e3fa0 (patch) | |
| tree | 632c889e110d9cf606050a32da9986e78291de73 /test | |
| parent | 0644c7a8aba4defca316c6dfa3485a79fe71e2b6 (diff) | |
| download | llvm-d1dc9a0af04cc136124e81509dff1e27151e3fa0.tar.gz llvm-d1dc9a0af04cc136124e81509dff1e27151e3fa0.tar.bz2 llvm-d1dc9a0af04cc136124e81509dff1e27151e3fa0.tar.xz | |
[mips] Add NaCl target and forbid indexed loads and stores for it
This patch adds NaCl target for Mips. It also forbids indexed loads and
stores if the target is NaCl.
Patch by Sasa Stankovic.
Differential Revision: http://llvm-reviews.chandlerc.com/D2690
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200855 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/Mips/fp-indexed-ls.ll | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/test/CodeGen/Mips/fp-indexed-ls.ll b/test/CodeGen/Mips/fp-indexed-ls.ll index 1c4a3fdb4a..d8c37e7d90 100644 --- a/test/CodeGen/Mips/fp-indexed-ls.ll +++ b/test/CodeGen/Mips/fp-indexed-ls.ll @@ -1,4 +1,6 @@ ; RUN: llc -march=mipsel -mcpu=mips32r2 < %s | FileCheck %s +; RUN: llc -mtriple=mipsel-none-nacl-gnu -mcpu=mips32r2 < %s \ +; RUN: | FileCheck %s -check-prefix=CHECK-NACL %struct.S = type <{ [4 x float] }> %struct.S2 = type <{ [4 x double] }> @@ -13,6 +15,7 @@ define float @foo0(float* nocapture %b, i32 %o) nounwind readonly { entry: ; CHECK: lwxc1 +; CHECK-NACL-NOT: lwxc1 %arrayidx = getelementptr inbounds float* %b, i32 %o %0 = load float* %arrayidx, align 4 ret float %0 @@ -21,6 +24,7 @@ entry: define double @foo1(double* nocapture %b, i32 %o) nounwind readonly { entry: ; CHECK: ldxc1 +; CHECK-NACL-NOT: ldxc1 %arrayidx = getelementptr inbounds double* %b, i32 %o %0 = load double* %arrayidx, align 8 ret double %0 @@ -37,6 +41,7 @@ entry: define void @foo3(float* nocapture %b, i32 %o) nounwind { entry: ; CHECK: swxc1 +; CHECK-NACL-NOT: swxc1 %0 = load float* @gf, align 4 %arrayidx = getelementptr inbounds float* %b, i32 %o store float %0, float* %arrayidx, align 4 @@ -46,6 +51,7 @@ entry: define void @foo4(double* nocapture %b, i32 %o) nounwind { entry: ; CHECK: sdxc1 +; CHECK-NACL-NOT: sdxc1 %0 = load double* @gd, align 8 %arrayidx = getelementptr inbounds double* %b, i32 %o store double %0, double* %arrayidx, align 8 |