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author | Reed Kotler <rkotler@mips.com> | 2013-11-29 22:32:56 +0000 |
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committer | Reed Kotler <rkotler@mips.com> | 2013-11-29 22:32:56 +0000 |
commit | dcb0422f25231f1b375943a0956c46b01c900375 (patch) | |
tree | f857cde46edb0d9de2d1f9cd7be89c8b98e32ae0 /test | |
parent | eb47ca45610710b433840b449f755269e47b4d68 (diff) | |
download | llvm-dcb0422f25231f1b375943a0956c46b01c900375.tar.gz llvm-dcb0422f25231f1b375943a0956c46b01c900375.tar.bz2 llvm-dcb0422f25231f1b375943a0956c46b01c900375.tar.xz |
Part 1 of 3 patches that completes very long conditional branches
in constant islands for Mips16. We introdcuce JalB16 as a synomnym
for Jal16. It makes it easier to read and is also necessary because
Jal16 is a call instruction but JalB16 is being used as a branch.
Various parts of LLVM will not work properly even in this late stage of
the backend if we use what was declared as a call instruction to function
as a branch. For one, basic block labels may not get emitted in some
situations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195968 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r-- | test/CodeGen/Mips/lcb3c.ll | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/test/CodeGen/Mips/lcb3c.ll b/test/CodeGen/Mips/lcb3c.ll new file mode 100644 index 0000000000..72a0b8cf5c --- /dev/null +++ b/test/CodeGen/Mips/lcb3c.ll @@ -0,0 +1,59 @@ +; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -soft-float -mips16-hard-float -relocation-model=static -O0 < %s | FileCheck %s -check-prefix=lcb + +@i = global i32 0, align 4 +@j = common global i32 0, align 4 +@k = common global i32 0, align 4 + +; Function Attrs: nounwind +define i32 @s() #0 { +entry: + %0 = load i32* @i, align 4 + %cmp = icmp eq i32 %0, 0 + br i1 %cmp, label %if.then, label %if.else + +if.then: ; preds = %entry + store i32 0, i32* @i, align 4 + call void asm sideeffect ".space 1000", ""() #1, !srcloc !1 + br label %if.end + +if.else: ; preds = %entry + store i32 1, i32* @i, align 4 + br label %if.end + +if.end: ; preds = %if.else, %if.then + ret i32 0 +; lcb: bnez $2, $BB0_2 +; lcb: b $BB0_1 # 16 bit inst +; lcb: $BB0_1: # %if.then +} + +; Function Attrs: nounwind +define i32 @b() #0 { +entry: + %0 = load i32* @i, align 4 + %cmp = icmp eq i32 %0, 0 + br i1 %cmp, label %if.then, label %if.else + +if.then: ; preds = %entry + store i32 0, i32* @i, align 4 + call void asm sideeffect ".space 1000000", ""() #1, !srcloc !2 + br label %if.end + +if.else: ; preds = %entry + store i32 1, i32* @i, align 4 + br label %if.end + +if.end: ; preds = %if.else, %if.then + ret i32 0 +} + +; lcb: beqz $2, $BB1_1 # 16 bit inst +; lcb: jal $BB1_2 # branch +; lcb: $BB1_1: # %if.then + +attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { nounwind } + + +!1 = metadata !{i32 65} +!2 = metadata !{i32 167} |