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| author | Juergen Ributzka <juergen@apple.com> | 2014-06-13 02:21:58 +0000 |
|---|---|---|
| committer | Juergen Ributzka <juergen@apple.com> | 2014-06-13 02:21:58 +0000 |
| commit | e431884ed751a78941cb32835d82dda24c839a1e (patch) | |
| tree | f71f9c0c911859e63dab05f89cf9d62b6770384a /test | |
| parent | 6b0a08b15b58e27785c30271c5f8c205a52c526e (diff) | |
| download | llvm-e431884ed751a78941cb32835d82dda24c839a1e.tar.gz llvm-e431884ed751a78941cb32835d82dda24c839a1e.tar.bz2 llvm-e431884ed751a78941cb32835d82dda24c839a1e.tar.xz | |
[FastISel][X86] Add support for cvttss2si/cvttsd2si intrinsics.
This adds support for the cvttss2si/cvttsd2si intrinsics. Preceding
insertelement instructions are folded into the conversion instruction (if
possible).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210870 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/X86/fast-isel-sse12-fptoint.ll | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/test/CodeGen/X86/fast-isel-sse12-fptoint.ll b/test/CodeGen/X86/fast-isel-sse12-fptoint.ll new file mode 100644 index 0000000000..769c987e60 --- /dev/null +++ b/test/CodeGen/X86/fast-isel-sse12-fptoint.ll @@ -0,0 +1,54 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx,+sse2 -fast-isel -fast-isel-abort | FileCheck %s --check-prefix=SSE +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx2,+avx -fast-isel -fast-isel-abort | FileCheck %s --check-prefix=AVX + +define i32 @cvt_test1(float %a) { +; SSE-LABEL: cvt_test1 +; SSE: cvttss2si %xmm0, %eax +; AVX-LABEL: cvt_test1 +; AVX: vcvttss2si %xmm0, %eax + %1 = insertelement <4 x float> undef, float %a, i32 0 + %2 = insertelement <4 x float> %1, float 0.000000e+00, i32 1 + %3 = insertelement <4 x float> %2, float 0.000000e+00, i32 2 + %4 = insertelement <4 x float> %3, float 0.000000e+00, i32 3 + %5 = call i32 @llvm.x86.sse.cvttss2si(<4 x float> %4) + ret i32 %5 +} +declare i32 @llvm.x86.sse.cvttss2si(<4 x float>) nounwind readnone + +define i64 @cvt_test2(float %a) { +; SSE-LABEL: cvt_test2 +; SSE: cvttss2si %xmm0, %rax +; AVX-LABEL: cvt_test2 +; AVX: vcvttss2si %xmm0, %rax + %1 = insertelement <4 x float> undef, float %a, i32 0 + %2 = insertelement <4 x float> %1, float 0.000000e+00, i32 1 + %3 = insertelement <4 x float> %2, float 0.000000e+00, i32 2 + %4 = insertelement <4 x float> %3, float 0.000000e+00, i32 3 + %5 = call i64 @llvm.x86.sse.cvttss2si64(<4 x float> %4) + ret i64 %5 +} +declare i64 @llvm.x86.sse.cvttss2si64(<4 x float>) nounwind readnone + +define i32 @cvt_test3(double %a) { +; SSE-LABEL: cvt_test3 +; SSE: cvttsd2si %xmm0, %eax +; AVX-LABEL: cvt_test3 +; AVX: vcvttsd2si %xmm0, %eax + %1 = insertelement <2 x double> undef, double %a, i32 0 + %2 = insertelement <2 x double> %1, double 0.000000e+00, i32 1 + %3 = call i32 @llvm.x86.sse2.cvttsd2si(<2 x double> %2) + ret i32 %3 +} +declare i32 @llvm.x86.sse2.cvttsd2si(<2 x double>) nounwind readnone + +define i64 @cvt_test4(double %a) { +; SSE-LABEL: cvt_test4 +; SSE: cvttsd2si %xmm0, %rax +; AVX-LABEL: cvt_test4 +; AVX: vcvttsd2si %xmm0, %rax + %1 = insertelement <2 x double> undef, double %a, i32 0 + %2 = insertelement <2 x double> %1, double 0.000000e+00, i32 1 + %3 = call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> %2) + ret i64 %3 +} +declare i64 @llvm.x86.sse2.cvttsd2si64(<2 x double>) nounwind readnone |