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| author | Tom Stellard <thomas.stellard@amd.com> | 2013-06-20 21:55:23 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2013-06-20 21:55:23 +0000 |
| commit | eb3aa070c9b3984c375ef65ef6e5f113efd7e968 (patch) | |
| tree | 171c48dd3fd450c8ac803f36d1737ce533992ed3 /test | |
| parent | 8592fba155ecb695b2b7686bbd03fe6e6ae87d10 (diff) | |
| download | llvm-eb3aa070c9b3984c375ef65ef6e5f113efd7e968.tar.gz llvm-eb3aa070c9b3984c375ef65ef6e5f113efd7e968.tar.bz2 llvm-eb3aa070c9b3984c375ef65ef6e5f113efd7e968.tar.xz | |
R600: Expand v2i32 load/store instead of custom lowering
The custom lowering causes llc to crash with a segfault.
Ideally, the custom lowering can be fixed, but this allows
programs which load/store v2i32 to work without crashing.
Patch by: Aaron Watry
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Aaron Watry<awatry@gmail.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184480 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/R600/load.vec.ll | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/test/CodeGen/R600/load.vec.ll b/test/CodeGen/R600/load.vec.ll index 08e034e456..da1149ae4b 100644 --- a/test/CodeGen/R600/load.vec.ll +++ b/test/CodeGen/R600/load.vec.ll @@ -1,6 +1,10 @@ +; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s ; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck --check-prefix=SI-CHECK %s ; load a v2i32 value from the global address space. +; EG-CHECK: @load_v2i32 +; EG-CHECK: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 4 +; EG-CHECK: VTX_READ_32 T{{[0-9]+}}.X, T{{[0-9]+}}.X, 0 ; SI-CHECK: @load_v2i32 ; SI-CHECK: BUFFER_LOAD_DWORDX2 VGPR{{[0-9]+}} define void @load_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) { @@ -10,6 +14,8 @@ define void @load_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %i } ; load a v4i32 value from the global address space. +; EG-CHECK: @load_v4i32 +; EG-CHECK: VTX_READ_128 T{{[0-9]+}}.XYZW, T{{[0-9]+}}.X, 0 ; SI-CHECK: @load_v4i32 ; SI-CHECK: BUFFER_LOAD_DWORDX4 VGPR{{[0-9]+}} define void @load_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) { |