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| author | Vincent Lejeune <vljn@ovi.com> | 2013-06-05 21:38:04 +0000 |
|---|---|---|
| committer | Vincent Lejeune <vljn@ovi.com> | 2013-06-05 21:38:04 +0000 |
| commit | f3d6e32c09ac73b49628f5ec7066af5eca2737b5 (patch) | |
| tree | 4987cf4dd9df217c3047a25032774fff2a4c5dd2 /test | |
| parent | f41d317054bc923c2f21d2529acae0e82e7341f3 (diff) | |
| download | llvm-f3d6e32c09ac73b49628f5ec7066af5eca2737b5.tar.gz llvm-f3d6e32c09ac73b49628f5ec7066af5eca2737b5.tar.bz2 llvm-f3d6e32c09ac73b49628f5ec7066af5eca2737b5.tar.xz | |
R600: Add a pass that merge Vector Register
Previously commited @183279 but tests were failing, reverted @183286
It was broken because @183336 was missing, now it's there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183343 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/R600/texture-input-merge.ll | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/test/CodeGen/R600/texture-input-merge.ll b/test/CodeGen/R600/texture-input-merge.ll new file mode 100644 index 0000000000..5d0ecef306 --- /dev/null +++ b/test/CodeGen/R600/texture-input-merge.ll @@ -0,0 +1,30 @@ +;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s + +;CHECK-NOT: MOV + +define void @test() { + %1 = call float @llvm.R600.load.input(i32 0) + %2 = call float @llvm.R600.load.input(i32 1) + %3 = call float @llvm.R600.load.input(i32 2) + %4 = call float @llvm.R600.load.input(i32 3) + %5 = fmul float %1, 3.0 + %6 = fmul float %2, 3.0 + %7 = fmul float %3, 3.0 + %8 = fmul float %4, 3.0 + %9 = insertelement <4 x float> undef, float %5, i32 0 + %10 = insertelement <4 x float> %9, float %6, i32 1 + %11 = insertelement <4 x float> undef, float %7, i32 0 + %12 = insertelement <4 x float> %11, float %5, i32 1 + %13 = insertelement <4 x float> undef, float %8, i32 0 + %14 = call <4 x float> @llvm.R600.tex(<4 x float> %10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0) + %15 = call <4 x float> @llvm.R600.tex(<4 x float> %12, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0) + %16 = call <4 x float> @llvm.R600.tex(<4 x float> %13, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0) + %17 = fadd <4 x float> %14, %15 + %18 = fadd <4 x float> %17, %16 + call void @llvm.R600.store.swizzle(<4 x float> %18, i32 0, i32 0) + ret void +} + +declare float @llvm.R600.load.input(i32) readnone +declare <4 x float> @llvm.R600.tex(<4 x float>, i32, i32, i32, i32, i32, i32, i32, i32, i32) readnone +declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32) |