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| author | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2013-06-21 14:43:42 +0000 |
|---|---|---|
| committer | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2013-06-21 14:43:42 +0000 |
| commit | f7c1ee79fe90353fcd3f545f9d45a01a837bbf4b (patch) | |
| tree | 37b1e4839ffd5e2f296e2c4b0ce071ade82dca8f /test | |
| parent | f8f87dcfceadd1b842d130303a7091ad7d7d67d0 (diff) | |
| download | llvm-f7c1ee79fe90353fcd3f545f9d45a01a837bbf4b.tar.gz llvm-f7c1ee79fe90353fcd3f545f9d45a01a837bbf4b.tar.bz2 llvm-f7c1ee79fe90353fcd3f545f9d45a01a837bbf4b.tar.xz | |
[PowerPC] Support @higher et.al. modifiers
This adds support for the @higher, @highera, @highest, and @highesta
modifers, including some missing relocation types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184550 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/MC/PowerPC/ppc64-fixup-apply.s | 10 | ||||
| -rw-r--r-- | test/MC/PowerPC/ppc64-fixups.s | 20 |
2 files changed, 29 insertions, 1 deletions
diff --git a/test/MC/PowerPC/ppc64-fixup-apply.s b/test/MC/PowerPC/ppc64-fixup-apply.s index 50f74bf98d..8d3a980116 100644 --- a/test/MC/PowerPC/ppc64-fixup-apply.s +++ b/test/MC/PowerPC/ppc64-fixup-apply.s @@ -38,6 +38,13 @@ addis 1, 1, target6@h .set target6, 0x4321fedc +addi 1, 1, target7@higher +addis 1, 1, target7@highest +addi 1, 1, target7@highera +addis 1, 1, target7@highesta + +.set target7, 0x1234ffffffff8000 + .data .quad v1 @@ -59,7 +66,7 @@ addis 1, 1, target6@h # CHECK-NEXT: ] # CHECK-NEXT: Address: 0x0 # CHECK-NEXT: Offset: -# CHECK-NEXT: Size: 48 +# CHECK-NEXT: Size: 64 # CHECK-NEXT: Link: 0 # CHECK-NEXT: Info: 0 # CHECK-NEXT: AddressAlignment: 4 @@ -68,6 +75,7 @@ addis 1, 1, target6@h # CHECK-NEXT: 0000: 38211234 3C211234 38215678 3C211234 # CHECK-NEXT: 0010: 38214444 3C211111 38218001 3C211001 # CHECK-NEXT: 0020: 38210008 3C210000 38214321 3C214321 +# CHECK-NEXT: 0030: 3821FFFF 3C211234 38210000 3C211235 # CHECK-NEXT: ) # CHECK-NEXT: } diff --git a/test/MC/PowerPC/ppc64-fixups.s b/test/MC/PowerPC/ppc64-fixups.s index 9accde047c..1b424d3a4b 100644 --- a/test/MC/PowerPC/ppc64-fixups.s +++ b/test/MC/PowerPC/ppc64-fixups.s @@ -57,6 +57,26 @@ # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HI target 0x0 lis 3, target@h +# CHECK: li 3, target@higher # encoding: [0x38,0x60,A,A] +# CHECK-NEXT: # fixup A - offset: 2, value: target@higher, kind: fixup_ppc_half16 +# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HIGHER target 0x0 + li 3, target@higher + +# CHECK: lis 3, target@highest # encoding: [0x3c,0x60,A,A] +# CHECK-NEXT: # fixup A - offset: 2, value: target@highest, kind: fixup_ppc_half16 +# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HIGHEST target 0x0 + lis 3, target@highest + +# CHECK: li 3, target@highera # encoding: [0x38,0x60,A,A] +# CHECK-NEXT: # fixup A - offset: 2, value: target@highera, kind: fixup_ppc_half16 +# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HIGHERA target 0x0 + li 3, target@highera + +# CHECK: lis 3, target@highesta # encoding: [0x3c,0x60,A,A] +# CHECK-NEXT: # fixup A - offset: 2, value: target@highesta, kind: fixup_ppc_half16 +# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HIGHESTA target 0x0 + lis 3, target@highesta + # CHECK: lwz 1, target@l(3) # encoding: [0x80,0x23,A,A] # CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16 # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0 |