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| author | Arnold Schwaighofer <aschwaighofer@apple.com> | 2013-07-05 18:28:39 +0000 |
|---|---|---|
| committer | Arnold Schwaighofer <aschwaighofer@apple.com> | 2013-07-05 18:28:39 +0000 |
| commit | ffd3bb8f0d875f4aae3097660f973b1e7512ee05 (patch) | |
| tree | fc5b421808be0bd3f62e06f3ffb2e192687a1e80 /test | |
| parent | 23191804e8cab4e60c82cd39f3a7d2ea152489a5 (diff) | |
| download | llvm-ffd3bb8f0d875f4aae3097660f973b1e7512ee05.tar.gz llvm-ffd3bb8f0d875f4aae3097660f973b1e7512ee05.tar.bz2 llvm-ffd3bb8f0d875f4aae3097660f973b1e7512ee05.tar.xz | |
ARM: Fix incorrect pack pattern
A "pkhtb x, x, y asr #num" uses the lower 16 bits of "y asr #num" and packs them
in the bottom half of "x". An arithmetic and logic shift are only equivalent in
this context if the shift amount is 16. We would be shifting in ones into the
bottom 16bits instead of zeros if "y" is negative.
radar://14338767
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185712 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/ARM/pack.ll | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/test/CodeGen/ARM/pack.ll b/test/CodeGen/ARM/pack.ll index 90151767b9..b94414328c 100644 --- a/test/CodeGen/ARM/pack.ll +++ b/test/CodeGen/ARM/pack.ll @@ -78,11 +78,24 @@ define i32 @test7(i32 %X, i32 %Y) { ret i32 %tmp57 } +; Arithmetic and logic right shift does not have the same semantics if shifting +; by more than 16 in this context. + ; CHECK: test8 -; CHECK: pkhtb r0, r0, r1, asr #22 +; CHECK-NOT: pkhtb r0, r0, r1, asr #22 define i32 @test8(i32 %X, i32 %Y) { %tmp1 = and i32 %X, -65536 %tmp3 = lshr i32 %Y, 22 %tmp57 = or i32 %tmp3, %tmp1 ret i32 %tmp57 } + +; CHECK: test9: +; CHECK: pkhtb r0, r0, r1, asr #16 +define i32 @test9(i32 %src1, i32 %src2) { +entry: + %tmp = and i32 %src1, -65536 + %tmp2 = lshr i32 %src2, 16 + %tmp3 = or i32 %tmp, %tmp2 + ret i32 %tmp3 +} |