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| author | Bill Wendling <isanbard@gmail.com> | 2011-10-12 23:03:40 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2011-10-12 23:03:40 +0000 |
| commit | f6fb7ed53c786228445fc55e8d495ccead59b9ae (patch) | |
| tree | f0df75224069055eb5cc43da328d1a97098a6f23 /unittests | |
| parent | 5c75af6eb72bd74bc35f46e5037dd5646e04f3b6 (diff) | |
| download | llvm-f6fb7ed53c786228445fc55e8d495ccead59b9ae.tar.gz llvm-f6fb7ed53c786228445fc55e8d495ccead59b9ae.tar.bz2 llvm-f6fb7ed53c786228445fc55e8d495ccead59b9ae.tar.xz | |
We need to verify that the machine instruction we're using as a replacement for
our current machine instruction defines a register with the same register class
as what's being replaced. This showed up in the SPEC 403.gcc benchmark, where it
would ICE because a tail call was expecting one register class but was given
another. (The machine instruction verifier catches this situation.)
<rdar://problem/10270968>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141830 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'unittests')
0 files changed, 0 insertions, 0 deletions