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authorDaniel Dunbar <daniel@zuster.org>2010-01-23 00:26:16 +0000
committerDaniel Dunbar <daniel@zuster.org>2010-01-23 00:26:16 +0000
commit1402f0b2cac017ab997f71ab4909a2ccfea7be4b (patch)
tree613fc5284b7718a57173eeff6b1d3d1c3946e220 /utils/TableGen/AsmMatcherEmitter.cpp
parentb6aebc2f468333f0817738aaf8670c11cc98ee3e (diff)
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AsmMatcher: Add a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94261 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/AsmMatcherEmitter.cpp')
-rw-r--r--utils/TableGen/AsmMatcherEmitter.cpp4
1 files changed, 4 insertions, 0 deletions
diff --git a/utils/TableGen/AsmMatcherEmitter.cpp b/utils/TableGen/AsmMatcherEmitter.cpp
index 019908bd59..8c37c3aabe 100644
--- a/utils/TableGen/AsmMatcherEmitter.cpp
+++ b/utils/TableGen/AsmMatcherEmitter.cpp
@@ -465,6 +465,10 @@ struct InstructionInfo {
if (Operands.size() != RHS.Operands.size())
return false;
+ // Otherwise, make sure the ordering of the two instructions is unambiguous
+ // by checking that either (a) a token or operand kind discriminates them,
+ // or (b) the ordering among equivalent kinds is consistent.
+
// Tokens and operand kinds are unambiguous (assuming a correct target
// specific parser).
for (unsigned i = 0, e = Operands.size(); i != e; ++i)