diff options
author | Owen Anderson <resistor@mac.com> | 2011-01-18 23:01:21 +0000 |
---|---|---|
committer | Owen Anderson <resistor@mac.com> | 2011-01-18 23:01:21 +0000 |
commit | 6cd0b17ba7f7efae41966c4a36ee725523d38575 (patch) | |
tree | 2e3332a6df5f83f76d8c3aafd93122136a57edf1 /utils/TableGen/AsmMatcherEmitter.cpp | |
parent | 61505907f54d4e7df2f9d90b1ed3a4caa0469d26 (diff) | |
download | llvm-6cd0b17ba7f7efae41966c4a36ee725523d38575.tar.gz llvm-6cd0b17ba7f7efae41966c4a36ee725523d38575.tar.bz2 llvm-6cd0b17ba7f7efae41966c4a36ee725523d38575.tar.xz |
When matching asm operands, always try to match the most restricted type first.
Unfortunately, while this is the "right" thing to do, it breaks some ARM
asm parsing tests because MemMode5 and ThumbMemModeReg are ambiguous. This
is tricky to resolve since neither is a subset of the other.
XFAIL the test for now. The old way was broken in other ways, just ways
we didn't happen to be testing, and our ARM asm parsing is going to require
significant revisiting at a later point anyways.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123786 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/AsmMatcherEmitter.cpp')
-rw-r--r-- | utils/TableGen/AsmMatcherEmitter.cpp | 39 |
1 files changed, 36 insertions, 3 deletions
diff --git a/utils/TableGen/AsmMatcherEmitter.cpp b/utils/TableGen/AsmMatcherEmitter.cpp index 38cd487912..be1cd709ca 100644 --- a/utils/TableGen/AsmMatcherEmitter.cpp +++ b/utils/TableGen/AsmMatcherEmitter.cpp @@ -1475,14 +1475,42 @@ static void EmitClassifyOperand(AsmMatcherInfo &Info, OS << " }\n"; OS << " }\n\n"; - // Classify user defined operands. + // Classify user defined operands. To do so, we need to perform a topological + // sort of the superclass relationship graph so that we always match the + // narrowest type first. + + // Collect the incoming edge counts for each class. + std::map<ClassInfo*, unsigned> IncomingEdges; for (std::vector<ClassInfo*>::iterator it = Info.Classes.begin(), ie = Info.Classes.end(); it != ie; ++it) { ClassInfo &CI = **it; if (!CI.isUserClass()) continue; - + + for (std::vector<ClassInfo*>::iterator SI = CI.SuperClasses.begin(), + SE = CI.SuperClasses.end(); SI != SE; ++SI) + ++IncomingEdges[*SI]; + } + + // Initialize a worklist of classes with no incoming edges. + std::vector<ClassInfo*> LeafClasses; + for (std::vector<ClassInfo*>::iterator it = Info.Classes.begin(), + ie = Info.Classes.end(); it != ie; ++it) { + if (!IncomingEdges[*it]) + LeafClasses.push_back(*it); + } + + // Iteratively pop the list, process that class, and update the incoming + // edge counts for its super classes. When a superclass reaches zero + // incoming edges, push it onto the worklist for processing. + while (!LeafClasses.empty()) { + ClassInfo &CI = *LeafClasses.back(); + LeafClasses.pop_back(); + + if (!CI.isUserClass()) + continue; + OS << " // '" << CI.ClassName << "' class"; if (!CI.SuperClasses.empty()) { OS << ", subclass of "; @@ -1490,6 +1518,10 @@ static void EmitClassifyOperand(AsmMatcherInfo &Info, if (i) OS << ", "; OS << "'" << CI.SuperClasses[i]->ClassName << "'"; assert(CI < *CI.SuperClasses[i] && "Invalid class relation!"); + + --IncomingEdges[CI.SuperClasses[i]]; + if (!IncomingEdges[CI.SuperClasses[i]]) + LeafClasses.push_back(CI.SuperClasses[i]); } } OS << "\n"; @@ -1502,10 +1534,11 @@ static void EmitClassifyOperand(AsmMatcherInfo &Info, OS << " assert(Operand." << CI.SuperClasses[i]->PredicateMethod << "() && \"Invalid class relationship!\");\n"; } - + OS << " return " << CI.Name << ";\n"; OS << " }\n\n"; } + OS << " return InvalidMatchClass;\n"; OS << "}\n\n"; } |