Teach tblgen about instruction operands that have multiple MachineInstr

operands, digging into them to find register values (used on X86).  Patch
by Evan Cheng!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24424 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 9 insertions, 2 deletions

diff --git a/utils/TableGen/CodeGenInstruction.h b/utils/TableGen/CodeGenInstruction.h
index cbf22db821..d400cadc0c 100644
--- a/utils/TableGen/CodeGenInstruction.h
+++ b/utils/TableGen/CodeGenInstruction.h
@@ -21,6 +21,7 @@
 
 namespace llvm {
   class Record;
+  class DagInit;
 
   struct CodeGenInstruction {
     Record *TheDef;            // The actual record defining this instruction.
@@ -59,10 +60,16 @@ namespace llvm {
       unsigned MIOperandNo;
       unsigned MINumOperands;   // The number of operands.
 
+      /// MIOperandInfo - Default MI operand type. Note an operand may be made up
+      /// of multiple MI operands.
+      DagInit *MIOperandInfo;
+
       OperandInfo(Record *R, MVT::ValueType T, const std::string &N,
-                  const std::string &PMN, unsigned MION, unsigned MINO)
+                  const std::string &PMN, unsigned MION, unsigned MINO,
+                  DagInit *MIOI)
+
         : Rec(R), Ty(T), Name(N), PrinterMethodName(PMN), MIOperandNo(MION),
-          MINumOperands(MINO) {}
+          MINumOperands(MINO), MIOperandInfo(MIOI) {}
     };
 
     /// OperandList - The list of declared operands, along with their declared