diff options
| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-08-22 23:33:58 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-08-22 23:33:58 +0000 |
| commit | 376a8a773e38fdcd9102a40e08ab1e0661d645d9 (patch) | |
| tree | 5c14492d6267298447ea064f3fcd5f786a33cc0d /utils/TableGen/CodeGenRegisters.cpp | |
| parent | 6c6237f8dce6787e550a3e243e22a085a2859fe8 (diff) | |
| download | llvm-376a8a773e38fdcd9102a40e08ab1e0661d645d9.tar.gz llvm-376a8a773e38fdcd9102a40e08ab1e0661d645d9.tar.bz2 llvm-376a8a773e38fdcd9102a40e08ab1e0661d645d9.tar.xz | |
Print out the location of expanded multiclass defs in TableGen errors.
When reporting an error for a defm, we would previously only report the
location of the outer defm, which is not always where the error is.
Now we also print the location of the expanded multiclass defs:
lib/Target/X86/X86InstrSSE.td:2902:12: error: foo
defm ADD : basic_sse12_fp_binop_s<0x58, "add", fadd, SSE_ALU_ITINS_S>,
^
lib/Target/X86/X86InstrSSE.td:2801:11: note: instantiated from multiclass
defm PD : sse12_fp_packed<opc, !strconcat(OpcodeStr, "pd"), OpNode, VR128,
^
lib/Target/X86/X86InstrSSE.td:194:5: note: instantiated from multiclass
def rm : PI<opc, MRMSrcMem, (outs RC:$dst), (ins RC:$src1, x86memop:$src2),
^
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162409 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/CodeGenRegisters.cpp')
| -rw-r--r-- | utils/TableGen/CodeGenRegisters.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/utils/TableGen/CodeGenRegisters.cpp b/utils/TableGen/CodeGenRegisters.cpp index 011f4b7938..b2e9e38bc1 100644 --- a/utils/TableGen/CodeGenRegisters.cpp +++ b/utils/TableGen/CodeGenRegisters.cpp @@ -298,7 +298,7 @@ CodeGenRegister::computeSubRegs(CodeGenRegBank &RegBank) { for (SubRegMap::const_iterator SI = SubRegs.begin(), SE = SubRegs.end(); SI != SE; ++SI) { if (SI->second == this) { - SMLoc Loc; + ArrayRef<SMLoc> Loc; if (TheDef) Loc = TheDef->getLoc(); throw TGError(Loc, "Register " + getName() + @@ -310,7 +310,7 @@ CodeGenRegister::computeSubRegs(CodeGenRegBank &RegBank) { if (Ins->second == SI->first) continue; // Trouble: Two different names for SI->second. - SMLoc Loc; + ArrayRef<SMLoc> Loc; if (TheDef) Loc = TheDef->getLoc(); throw TGError(Loc, "Sub-register can't have two names: " + |