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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-10-05 00:35:49 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-10-05 00:35:49 +0000 |
commit | 845d2c0c776abce551d16f7b1b7dc1f4d4df1a27 (patch) | |
tree | 204c79f6f26643a182bb869965b36795d212421e /utils/TableGen/CodeGenRegisters.cpp | |
parent | 2a85015313b585c2a6d2a59d5bfc99a5ebe88f30 (diff) | |
download | llvm-845d2c0c776abce551d16f7b1b7dc1f4d4df1a27.tar.gz llvm-845d2c0c776abce551d16f7b1b7dc1f4d4df1a27.tar.bz2 llvm-845d2c0c776abce551d16f7b1b7dc1f4d4df1a27.tar.xz |
Add TRI::getSubClassWithSubReg(RC, Idx) function.
This function is used to constrain a register class to a sub-class that
supports the given sub-register index.
For example, getSubClassWithSubReg(GR32, sub_8bit) -> GR32_ABCD.
The function will be used to compute register classes when emitting
INSERT_SUBREG and EXTRACT_SUBREG nodes and for register class inflation
of sub-register operations.
The version provided by TableGen is usually adequate, but targets can
override.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141142 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/CodeGenRegisters.cpp')
-rw-r--r-- | utils/TableGen/CodeGenRegisters.cpp | 20 |
1 files changed, 14 insertions, 6 deletions
diff --git a/utils/TableGen/CodeGenRegisters.cpp b/utils/TableGen/CodeGenRegisters.cpp index b731544616..8de4615279 100644 --- a/utils/TableGen/CodeGenRegisters.cpp +++ b/utils/TableGen/CodeGenRegisters.cpp @@ -768,23 +768,31 @@ void CodeGenRegBank::computeInferredRegisterClasses() { // Find matching classes for all SRSets entries. Iterate in SubRegIndex // numerical order to visit synthetic indices last. for (unsigned sri = 0, sre = SubRegIndices.size(); sri != sre; ++sri) { - SubReg2SetMap::const_iterator I = SRSets.find(SubRegIndices[sri]); + Record *SubIdx = SubRegIndices[sri]; + SubReg2SetMap::const_iterator I = SRSets.find(SubIdx); // Unsupported SubRegIndex. Skip it. if (I == SRSets.end()) continue; - // In most cases, all RC registers support the SubRegIndex. Skip those. - if (I->second.size() == RC.getMembers().size()) + // In most cases, all RC registers support the SubRegIndex. + if (I->second.size() == RC.getMembers().size()) { + RC.setSubClassWithSubReg(SubIdx, &RC); continue; + } // This is a real subset. See if we have a matching class. CodeGenRegisterClass::Key K(&I->second, RC.SpillSize, RC.SpillAlignment); RCKeyMap::const_iterator FoundI = Key2RC.find(K); - if (FoundI != Key2RC.end()) + if (FoundI != Key2RC.end()) { + RC.setSubClassWithSubReg(SubIdx, FoundI->second); continue; + } // Class doesn't exist. - addToMaps(new CodeGenRegisterClass(RC.getName() + "_with_" + - I->first->getName(), K)); + CodeGenRegisterClass *NewRC = + new CodeGenRegisterClass(RC.getName() + "_with_" + + I->first->getName(), K); + addToMaps(NewRC); + RC.setSubClassWithSubReg(SubIdx, NewRC); } } } |