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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-06-18 03:08:20 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-06-18 03:08:20 +0000 |
| commit | 54c47c1ce94b9e549ef768e80fd004788d13ce85 (patch) | |
| tree | 6e6092299320c03acddf968e617778dccca01e20 /utils/TableGen/CodeGenRegisters.h | |
| parent | 4b2a174e21b7cfc2c45db895efc7c638e4c68538 (diff) | |
| download | llvm-54c47c1ce94b9e549ef768e80fd004788d13ce85.tar.gz llvm-54c47c1ce94b9e549ef768e80fd004788d13ce85.tar.bz2 llvm-54c47c1ce94b9e549ef768e80fd004788d13ce85.tar.xz | |
Remove MethodProtos/MethodBodies and allocation_order_begin/end.
Targets that need to change the default allocation order should use the
AltOrders mechanism instead. See the X86 and ARM targets for examples.
The allocation_order_begin() and allocation_order_end() methods have been
replaced with getRawAllocationOrder(), and there is further support
functions in RegisterClassInfo.
It is no longer possible to insert arbitrary code into generated
register classes. This is a feature.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133332 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/CodeGenRegisters.h')
| -rw-r--r-- | utils/TableGen/CodeGenRegisters.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/utils/TableGen/CodeGenRegisters.h b/utils/TableGen/CodeGenRegisters.h index 5e3d5e59c1..5260a14427 100644 --- a/utils/TableGen/CodeGenRegisters.h +++ b/utils/TableGen/CodeGenRegisters.h @@ -97,7 +97,7 @@ namespace llvm { bool Allocatable; // Map SubRegIndex -> RegisterClass DenseMap<Record*,Record*> SubRegClasses; - std::string MethodProtos, MethodBodies, AltOrderSelect; + std::string AltOrderSelect; const std::string &getName() const; const std::vector<MVT::SimpleValueType> &getValueTypes() const {return VTs;} |