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authorJakob Stoklund Olesen <stoklund@2pi.dk>2011-06-18 00:50:49 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2011-06-18 00:50:49 +0000
commitb4c704877d1600852a55ab7bef2918a7c0af5e0d (patch)
tree797c8330b51e92939fa6b20a2b45674a8e02d32a /utils/TableGen/CodeGenRegisters.h
parentedb15d6872c4475f45f3182960bd138acda6799e (diff)
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Provide AltOrders for specifying alternative allocation orders.
A register class can define AltOrders and AltOrderSelect instead of defining method protos and bodies. The AltOrders lists can be defined with set operations, and TableGen can verify that the alternative allocation orders only contain valid registers. This is currently an opt-in feature, and it is still possible to override allocation_order_begin/end. That will not be true for long. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133320 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/CodeGenRegisters.h')
-rw-r--r--utils/TableGen/CodeGenRegisters.h14
1 files changed, 11 insertions, 3 deletions
diff --git a/utils/TableGen/CodeGenRegisters.h b/utils/TableGen/CodeGenRegisters.h
index 55f0b9b3aa..5e3d5e59c1 100644
--- a/utils/TableGen/CodeGenRegisters.h
+++ b/utils/TableGen/CodeGenRegisters.h
@@ -86,6 +86,7 @@ namespace llvm {
class CodeGenRegisterClass {
CodeGenRegister::Set Members;
const std::vector<Record*> *Elements;
+ std::vector<SmallVector<Record*, 16> > AltOrders;
public:
Record *TheDef;
std::string Namespace;
@@ -96,7 +97,7 @@ namespace llvm {
bool Allocatable;
// Map SubRegIndex -> RegisterClass
DenseMap<Record*,Record*> SubRegClasses;
- std::string MethodProtos, MethodBodies;
+ std::string MethodProtos, MethodBodies, AltOrderSelect;
const std::string &getName() const;
const std::vector<MVT::SimpleValueType> &getValueTypes() const {return VTs;}
@@ -125,10 +126,17 @@ namespace llvm {
// Returns an ordered list of class members.
// The order of registers is the same as in the .td file.
- ArrayRef<Record*> getOrder() const {
- return *Elements;
+ // No = 0 is the default allocation order, No = 1 is the first alternative.
+ ArrayRef<Record*> getOrder(unsigned No = 0) const {
+ if (No == 0)
+ return *Elements;
+ else
+ return AltOrders[No - 1];
}
+ // Return the total number of allocation orders available.
+ unsigned getNumOrders() const { return 1 + AltOrders.size(); }
+
CodeGenRegisterClass(CodeGenRegBank&, Record *R);
};