summaryrefslogtreecommitdiff
path: root/utils/TableGen/DAGISelEmitter.cpp
diff options
context:
space:
mode:
authorDan Gohman <gohman@apple.com>2008-06-02 17:40:38 +0000
committerDan Gohman <gohman@apple.com>2008-06-02 17:40:38 +0000
commit37cdad3e59d05b82a9322dcd86886788b6387019 (patch)
treecaa3b98b31eb16d6501bf8ee0f86ba55a7a18e65 /utils/TableGen/DAGISelEmitter.cpp
parente3abb0a858ceaea4a4ffa7c1874be8426d2724bc (diff)
downloadllvm-37cdad3e59d05b82a9322dcd86886788b6387019.tar.gz
llvm-37cdad3e59d05b82a9322dcd86886788b6387019.tar.bz2
llvm-37cdad3e59d05b82a9322dcd86886788b6387019.tar.xz
Fix the position of MemOperands in nodes that use variadic_ops
in DAGISelEmitter output. This bug was recently uncovered by the addition of patterns for CALL32m and CALL64m, which are nodes that now have both MemOperands and variadic_ops. This bug was especially visible with PIC in various configurations, because the new patterns are matching the indirect call code used in many PIC configurations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51877 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/DAGISelEmitter.cpp')
-rw-r--r--utils/TableGen/DAGISelEmitter.cpp27
1 files changed, 15 insertions, 12 deletions
diff --git a/utils/TableGen/DAGISelEmitter.cpp b/utils/TableGen/DAGISelEmitter.cpp
index 29fec09515..a4d08c6d0b 100644
--- a/utils/TableGen/DAGISelEmitter.cpp
+++ b/utils/TableGen/DAGISelEmitter.cpp
@@ -992,18 +992,6 @@ public:
}
}
- // Generate MemOperandSDNodes nodes for each memory accesses covered by
- // this pattern.
- if (II.isSimpleLoad | II.mayLoad | II.mayStore) {
- std::vector<std::string>::const_iterator mi, mie;
- for (mi = LSI.begin(), mie = LSI.end(); mi != mie; ++mi) {
- emitCode("SDOperand LSI_" + *mi + " = "
- "CurDAG->getMemOperand(cast<LSBaseSDNode>(" +
- *mi + ")->getMemOperand());");
- AllOps.push_back("LSI_" + *mi);
- }
- }
-
// Emit all the chain and CopyToReg stuff.
bool ChainEmitted = NodeHasChain;
if (NodeHasChain)
@@ -1088,6 +1076,21 @@ public:
emitCode("}");
}
+ // Generate MemOperandSDNodes nodes for each memory accesses covered by
+ // this pattern.
+ if (II.isSimpleLoad | II.mayLoad | II.mayStore) {
+ std::vector<std::string>::const_iterator mi, mie;
+ for (mi = LSI.begin(), mie = LSI.end(); mi != mie; ++mi) {
+ emitCode("SDOperand LSI_" + *mi + " = "
+ "CurDAG->getMemOperand(cast<LSBaseSDNode>(" +
+ *mi + ")->getMemOperand());");
+ if (IsVariadic)
+ emitCode("Ops" + utostr(OpsNo) + ".push_back(LSI_" + *mi + ");");
+ else
+ AllOps.push_back("LSI_" + *mi);
+ }
+ }
+
if (NodeHasChain) {
if (IsVariadic)
emitCode("Ops" + utostr(OpsNo) + ".push_back(" + ChainName + ");");