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author | Evan Cheng <evan.cheng@apple.com> | 2007-05-08 21:04:07 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2007-05-08 21:04:07 +0000 |
commit | 59039632e120de996f36db707e4718b469c7228b (patch) | |
tree | 64d412d93fe28078b71c7cd114018650e0d4dded /utils/TableGen/DAGISelEmitter.cpp | |
parent | a7a5bad38ca2073875d3bf725c985148f50b56cb (diff) | |
download | llvm-59039632e120de996f36db707e4718b469c7228b.tar.gz llvm-59039632e120de996f36db707e4718b469c7228b.tar.bz2 llvm-59039632e120de996f36db707e4718b469c7228b.tar.xz |
If a PredicateOperand has an empty ExecuteAlways field, treat it as if a normal operand for isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36946 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/DAGISelEmitter.cpp')
-rw-r--r-- | utils/TableGen/DAGISelEmitter.cpp | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/utils/TableGen/DAGISelEmitter.cpp b/utils/TableGen/DAGISelEmitter.cpp index e10558ef72..c3db37e696 100644 --- a/utils/TableGen/DAGISelEmitter.cpp +++ b/utils/TableGen/DAGISelEmitter.cpp @@ -775,8 +775,10 @@ bool TreePatternNode::ApplyTypeConstraints(TreePattern &TP, bool NotRegisters) { Record *OperandNode = Inst.getOperand(i); // If the instruction expects a predicate operand, we codegen this by - // setting the predicate to it's "execute always" value. - if (OperandNode->isSubClassOf("PredicateOperand")) + // setting the predicate to it's "execute always" value if it has a + // non-empty ExecuteAlways field. + if (OperandNode->isSubClassOf("PredicateOperand") && + !ISE.getPredicateOperand(OperandNode).AlwaysOps.empty()) continue; // Verify that we didn't run out of provided operands. @@ -2801,8 +2803,11 @@ public: InstOpNo != II.OperandList.size(); ++InstOpNo) { std::vector<std::string> Ops; - // If this is a normal operand, emit it. - if (!II.OperandList[InstOpNo].Rec->isSubClassOf("PredicateOperand")) { + // If this is a normal operand or a predicate operand without + // 'execute always', emit it. + Record *OperandNode = II.OperandList[InstOpNo].Rec; + if (!OperandNode->isSubClassOf("PredicateOperand") || + ISE.getPredicateOperand(OperandNode).AlwaysOps.empty()) { Ops = EmitResultCode(N->getChild(ChildNo), RetSelected, InFlagDecled, ResNodeDecled); AllOps.insert(AllOps.end(), Ops.begin(), Ops.end()); |