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author | Eric Christopher <echristo@apple.com> | 2010-08-25 04:58:56 +0000 |
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committer | Eric Christopher <echristo@apple.com> | 2010-08-25 04:58:56 +0000 |
commit | 53452606ca04929257b3bcbfa5e0d59a44925882 (patch) | |
tree | 10b43efd73c8cd642a9b5758eb5e9451729c5416 /utils/TableGen/FastISelEmitter.cpp | |
parent | 7226a0eb5202b82dab263b0b601fc02e003c8f8f (diff) | |
download | llvm-53452606ca04929257b3bcbfa5e0d59a44925882.tar.gz llvm-53452606ca04929257b3bcbfa5e0d59a44925882.tar.bz2 llvm-53452606ca04929257b3bcbfa5e0d59a44925882.tar.xz |
Allow strict subclasses of register classes, this way we can handle
ARM instructions with:
foo GPR, rGPR
which happens a lot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112025 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/FastISelEmitter.cpp')
-rw-r--r-- | utils/TableGen/FastISelEmitter.cpp | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/utils/TableGen/FastISelEmitter.cpp b/utils/TableGen/FastISelEmitter.cpp index 243208612d..6c16fcfaa8 100644 --- a/utils/TableGen/FastISelEmitter.cpp +++ b/utils/TableGen/FastISelEmitter.cpp @@ -112,9 +112,10 @@ struct OperandsSignature { if (!RC) return false; - // For now, all the operands must have the same register class. + // For now, all the operands must have the same register class or be + // a strict subclass of the destination. if (DstRC) { - if (DstRC != RC) + if (DstRC != RC && !DstRC->hasSubClass(RC)) return false; } else DstRC = RC; |