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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-08-16 23:11:47 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-08-16 23:11:47 +0000 |
| commit | f2c64ef519b38a4328809b27b4a3a8e0c26e9709 (patch) | |
| tree | ce3233b4960acdefe47ab3644925c8196a84e3c3 /utils/TableGen/InstrInfoEmitter.cpp | |
| parent | 05b2bc8781d9af403a257599613e12cb8fef19e8 (diff) | |
| download | llvm-f2c64ef519b38a4328809b27b4a3a8e0c26e9709.tar.gz llvm-f2c64ef519b38a4328809b27b4a3a8e0c26e9709.tar.bz2 llvm-f2c64ef519b38a4328809b27b4a3a8e0c26e9709.tar.xz | |
Add an MCID::Select flag and TII hooks for optimizing selects.
Select instructions pick one of two virtual registers based on a
condition, like x86 cmov. On targets like ARM that support predication,
selects can sometimes be eliminated by predicating the instruction
defining one of the operands.
Teach PeepholeOptimizer to recognize select instructions, and ask the
target to optimize them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162059 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/InstrInfoEmitter.cpp')
| -rw-r--r-- | utils/TableGen/InstrInfoEmitter.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp index 3adb8694d9..b41ad94aca 100644 --- a/utils/TableGen/InstrInfoEmitter.cpp +++ b/utils/TableGen/InstrInfoEmitter.cpp @@ -319,6 +319,7 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num, if (Inst.isCompare) OS << "|(1<<MCID::Compare)"; if (Inst.isMoveImm) OS << "|(1<<MCID::MoveImm)"; if (Inst.isBitcast) OS << "|(1<<MCID::Bitcast)"; + if (Inst.isSelect) OS << "|(1<<MCID::Select)"; if (Inst.isBarrier) OS << "|(1<<MCID::Barrier)"; if (Inst.hasDelaySlot) OS << "|(1<<MCID::DelaySlot)"; if (Inst.isCall) OS << "|(1<<MCID::Call)"; |