Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.inc

into XXXGenRegisterInfo.inc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133922 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 13 insertions, 7 deletions

diff --git a/utils/TableGen/RegisterInfoEmitter.h b/utils/TableGen/RegisterInfoEmitter.h
index 6bf14b259a..d625b7d39a 100644
--- a/utils/TableGen/RegisterInfoEmitter.h
+++ b/utils/TableGen/RegisterInfoEmitter.h
@@ -20,22 +20,28 @@
 
 namespace llvm {
 
+class CodeGenRegBank;
+class CodeGenTarget;
+
 class RegisterInfoEmitter : public TableGenBackend {
   RecordKeeper &Records;
 public:
   RegisterInfoEmitter(RecordKeeper &R) : Records(R) {}
 
-  // run - Output the register file description, returning true on failure.
-  void run(raw_ostream &o);
+  // runEnums - Print out enum values for all of the registers.
+  void runEnums(raw_ostream &o, CodeGenTarget &Target, CodeGenRegBank &Bank);
 
   // runHeader - Emit a header fragment for the register info emitter.
-  void runHeader(raw_ostream &o);
+  void runHeader(raw_ostream &o, CodeGenTarget &Target);
 
-  // runEnums - Print out enum values for all of the registers.
-  void runEnums(raw_ostream &o);
+  // runMCDesc - Print out MC register descriptions.
+  void runMCDesc(raw_ostream &o, CodeGenTarget &Target, CodeGenRegBank &Bank);
+
+  // runTargetDesc - Output the target register and register file descriptions.
+  void runTargetDesc(raw_ostream &o, CodeGenTarget &Target, CodeGenRegBank &Bank);
 
-  // runDesc - Print out register descriptions.
-  void runDesc(raw_ostream &o);
+  // run - Output the register file description.
+  void run(raw_ostream &o);
 };
 
 } // End llvm namespace