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authorCraig Topper <craig.topper@gmail.com>2012-07-31 05:27:01 +0000
committerCraig Topper <craig.topper@gmail.com>2012-07-31 05:27:01 +0000
commit9840009ff8a696ea4edeb4d9b015f2ce18242855 (patch)
tree61e03a15d9af987b3551b261e9d593b236b2332b /utils/TableGen/X86DisassemblerTables.cpp
parentc60685e3207518de468b2cf21b470a9cbe3da00a (diff)
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Remove trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161030 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/X86DisassemblerTables.cpp')
-rw-r--r--utils/TableGen/X86DisassemblerTables.cpp62
1 files changed, 31 insertions, 31 deletions
diff --git a/utils/TableGen/X86DisassemblerTables.cpp b/utils/TableGen/X86DisassemblerTables.cpp
index 2875168a10..b0fd6ab674 100644
--- a/utils/TableGen/X86DisassemblerTables.cpp
+++ b/utils/TableGen/X86DisassemblerTables.cpp
@@ -24,7 +24,7 @@
using namespace llvm;
using namespace X86Disassembler;
-
+
/// inheritsFrom - Indicates whether all instructions in one class also belong
/// to another class.
///
@@ -36,7 +36,7 @@ static inline bool inheritsFrom(InstructionContext child,
bool VEX_LIG = false) {
if (child == parent)
return true;
-
+
switch (parent) {
case IC:
return(inheritsFrom(child, IC_64BIT) ||
@@ -117,17 +117,17 @@ static inline bool inheritsFrom(InstructionContext child,
/// @param upper - The class that may be preferable
/// @param lower - The class that may be less preferable
/// @return - True if upper is to be preferred, false otherwise.
-static inline bool outranks(InstructionContext upper,
+static inline bool outranks(InstructionContext upper,
InstructionContext lower) {
assert(upper < IC_max);
assert(lower < IC_max);
-
+
#define ENUM_ENTRY(n, r, d) r,
static int ranks[IC_max] = {
INSTRUCTION_CONTEXTS
};
#undef ENUM_ENTRY
-
+
return (ranks[upper] > ranks[lower]);
}
@@ -178,16 +178,16 @@ void DisassemblerTables::emitOneID(raw_ostream &o,
o.indent(i * 2) << format("0x%hx", id);
else
o.indent(i * 2) << 0;
-
+
if (addComma)
o << ", ";
else
o << " ";
-
+
o << "/* ";
o << InstructionSpecifiers[id].name;
o << "*/";
-
+
o << "\n";
}
@@ -252,19 +252,19 @@ static ModRMDecisionType getDecisionType(ModRMDecision &decision)
/// to a particular decision type.
///
/// @param dt - The decision type.
-/// @return - A pointer to the statically-allocated string (e.g.,
+/// @return - A pointer to the statically-allocated string (e.g.,
/// "MODRM_ONEENTRY" for MODRM_ONEENTRY).
static const char* stringForDecisionType(ModRMDecisionType dt)
{
#define ENUM_ENTRY(n) case n: return #n;
switch (dt) {
default:
- llvm_unreachable("Unknown decision type");
+ llvm_unreachable("Unknown decision type");
MODRMTYPES
- };
+ };
#undef ENUM_ENTRY
}
-
+
/// stringForModifierType - Returns a statically-allocated string corresponding
/// to an opcode modifier type.
///
@@ -281,25 +281,25 @@ static const char* stringForModifierType(ModifierType mt)
};
#undef ENUM_ENTRY
}
-
+
DisassemblerTables::DisassemblerTables() {
unsigned i;
-
+
for (i = 0; i < array_lengthof(Tables); i++) {
Tables[i] = new ContextDecision;
memset(Tables[i], 0, sizeof(ContextDecision));
}
-
+
HasConflicts = false;
}
-
+
DisassemblerTables::~DisassemblerTables() {
unsigned i;
-
+
for (i = 0; i < array_lengthof(Tables); i++)
delete Tables[i];
}
-
+
void DisassemblerTables::emitModRMDecision(raw_ostream &o1,
raw_ostream &o2,
uint32_t &i1,
@@ -444,11 +444,11 @@ void DisassemblerTables::emitContextDecision(
o2.indent(i2) << "};" << "\n";
}
-void DisassemblerTables::emitInstructionInfo(raw_ostream &o, uint32_t &i)
+void DisassemblerTables::emitInstructionInfo(raw_ostream &o, uint32_t &i)
const {
o.indent(i * 2) << "static const struct InstructionSpecifier ";
o << INSTRUCTIONS_STR "[" << InstructionSpecifiers.size() << "] = {\n";
-
+
i++;
uint16_t numInstructions = InstructionSpecifiers.size();
@@ -488,7 +488,7 @@ void DisassemblerTables::emitInstructionInfo(raw_ostream &o, uint32_t &i)
i--;
o.indent(i * 2) << "}," << "\n";
-
+
o.indent(i * 2) << "/* " << InstructionSpecifiers[index].name << " */";
o << "\n";
@@ -545,7 +545,7 @@ void DisassemblerTables::emitContextTable(raw_ostream &o, uint32_t &i) const {
o << "IC_64BIT_REXW_XS";
else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XD))
o << "IC_64BIT_REXW_XD";
- else if ((index & ATTR_64BIT) && (index & ATTR_REXW) &&
+ else if ((index & ATTR_64BIT) && (index & ATTR_REXW) &&
(index & ATTR_OPSIZE))
o << "IC_64BIT_REXW_OPSIZE";
else if ((index & ATTR_64BIT) && (index & ATTR_XD) && (index & ATTR_OPSIZE))
@@ -609,13 +609,13 @@ void DisassemblerTables::emitContextDecisions(raw_ostream &o1,
void DisassemblerTables::emit(raw_ostream &o) const {
uint32_t i1 = 0;
uint32_t i2 = 0;
-
+
std::string s1;
std::string s2;
-
+
raw_string_ostream o1(s1);
raw_string_ostream o2(s2);
-
+
emitInstructionInfo(o, i2);
o << "\n";
@@ -653,10 +653,10 @@ void DisassemblerTables::setTableFields(ModRMDecision &decision,
InstructionSpecifiers[uid];
InstructionSpecifier &previousInfo =
InstructionSpecifiers[decision.instructionIDs[index]];
-
+
if(newInfo.filtered)
continue; // filtered instructions get lowest priority
-
+
if(previousInfo.name == "NOOP" && (newInfo.name == "XCHG16ar" ||
newInfo.name == "XCHG32ar" ||
newInfo.name == "XCHG32ar64" ||
@@ -665,7 +665,7 @@ void DisassemblerTables::setTableFields(ModRMDecision &decision,
if (outranks(previousInfo.insnContext, newInfo.insnContext))
continue;
-
+
if (previousInfo.insnContext == newInfo.insnContext &&
!previousInfo.filtered) {
errs() << "Error: Primary decode conflict: ";
@@ -691,16 +691,16 @@ void DisassemblerTables::setTableFields(OpcodeType type,
bool is32bit,
bool ignoresVEX_L) {
unsigned index;
-
+
ContextDecision &decision = *Tables[type];
for (index = 0; index < IC_max; ++index) {
if (is32bit && inheritsFrom((InstructionContext)index, IC_64BIT))
continue;
- if (inheritsFrom((InstructionContext)index,
+ if (inheritsFrom((InstructionContext)index,
InstructionSpecifiers[uid].insnContext, ignoresVEX_L))
- setTableFields(decision.opcodeDecisions[index].modRMDecisions[opcode],
+ setTableFields(decision.opcodeDecisions[index].modRMDecisions[opcode],
filter,
uid,
opcode);