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authorSean Callanan <scallanan@apple.com>2010-02-24 02:56:25 +0000
committerSean Callanan <scallanan@apple.com>2010-02-24 02:56:25 +0000
commit80443f914624098db7088d751efbb8dae7743b76 (patch)
tree43fd17ad98de500c7237b44d997a127eb87a0574 /utils/TableGen/X86RecognizableInstr.cpp
parent5f366af2ff36cc65fe4964194b07bf1455828ff0 (diff)
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Changed the table generator so that the X86
disassembler never recognizes InitReg instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97017 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/X86RecognizableInstr.cpp')
-rw-r--r--utils/TableGen/X86RecognizableInstr.cpp7
1 files changed, 4 insertions, 3 deletions
diff --git a/utils/TableGen/X86RecognizableInstr.cpp b/utils/TableGen/X86RecognizableInstr.cpp
index 3843e56d98..ea78d4193e 100644
--- a/utils/TableGen/X86RecognizableInstr.cpp
+++ b/utils/TableGen/X86RecognizableInstr.cpp
@@ -282,6 +282,10 @@ RecognizableInstr::filter_ret RecognizableInstr::filter() const {
IsCodeGenOnly)
return FILTER_STRONG;
+ if (Form == X86Local::MRMInitReg)
+ return FILTER_STRONG;
+
+
// Filter out instructions with a LOCK prefix;
// prefer forms that do not have the prefix
if (HasLockPrefix)
@@ -353,9 +357,6 @@ RecognizableInstr::filter_ret RecognizableInstr::filter() const {
if (AsmString.find("subreg") != AsmString.npos)
return FILTER_STRONG;
- assert(Form != X86Local::MRMInitReg &&
- "FORMAT_MRMINITREG instruction not skipped");
-
if (HasFROperands && Name.find("MOV") != Name.npos &&
((Name.find("2") != Name.npos && Name.find("32") == Name.npos) ||
(Name.find("to") != Name.npos)))