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authorChris Lattner <sabre@nondot.org>2004-08-17 03:08:28 +0000
committerChris Lattner <sabre@nondot.org>2004-08-17 03:08:28 +0000
commit2c38413b3f5420f45f2f8220b21862246d446dd0 (patch)
tree46bb232564b53a3493e7b5f183359fb825d92faa /utils/TableGen
parent250c4184c727a81b7912f08c3ef2928a700834de (diff)
downloadllvm-2c38413b3f5420f45f2f8220b21862246d446dd0.tar.gz
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Do not #include files into the llvm namespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15849 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen')
-rw-r--r--utils/TableGen/AsmWriterEmitter.cpp3
-rw-r--r--utils/TableGen/CodeEmitterGen.cpp3
-rw-r--r--utils/TableGen/InstrInfoEmitter.cpp7
-rw-r--r--utils/TableGen/InstrSelectorEmitter.cpp4
-rw-r--r--utils/TableGen/RegisterInfoEmitter.cpp11
-rw-r--r--utils/TableGen/TableGenBackend.cpp6
-rw-r--r--utils/TableGen/TableGenBackend.h4
7 files changed, 20 insertions, 18 deletions
diff --git a/utils/TableGen/AsmWriterEmitter.cpp b/utils/TableGen/AsmWriterEmitter.cpp
index 7b3a5046c3..64debe27f8 100644
--- a/utils/TableGen/AsmWriterEmitter.cpp
+++ b/utils/TableGen/AsmWriterEmitter.cpp
@@ -27,6 +27,7 @@ static bool isIdentChar(char C) {
void AsmWriterEmitter::run(std::ostream &O) {
EmitSourceFileHeader("Assembly Writer Source Fragment", O);
+ O << "namespace llvm {\n\n";
CodeGenTarget Target;
@@ -103,5 +104,5 @@ void AsmWriterEmitter::run(std::ostream &O) {
O << " }\n"
" return true;\n"
"}\n";
- EmitSourceFileTail(O);
+ O << "} // End llvm namespace \n";
}
diff --git a/utils/TableGen/CodeEmitterGen.cpp b/utils/TableGen/CodeEmitterGen.cpp
index 689465cbf8..906f4d6c72 100644
--- a/utils/TableGen/CodeEmitterGen.cpp
+++ b/utils/TableGen/CodeEmitterGen.cpp
@@ -24,6 +24,7 @@ void CodeEmitterGen::run(std::ostream &o) {
std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
EmitSourceFileHeader("Machine Code Emitter", o);
+ o << "namespace llvm {\n\n";
std::string Namespace = Insts[0]->getValueAsString("Namespace") + "::";
// Emit function declaration
@@ -225,5 +226,5 @@ void CodeEmitterGen::run(std::ostream &o) {
<< " return Value;\n"
<< "}\n";
- EmitSourceFileTail(o);
+ o << "} // End llvm namespace \n";
}
diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp
index 3470b2d01b..0596f439cf 100644
--- a/utils/TableGen/InstrInfoEmitter.cpp
+++ b/utils/TableGen/InstrInfoEmitter.cpp
@@ -20,6 +20,7 @@ using namespace llvm;
// runEnums - Print out enum values for all of the instructions.
void InstrInfoEmitter::runEnums(std::ostream &OS) {
EmitSourceFileHeader("Target Instruction Enum Values", OS);
+ OS << "namespace llvm {\n\n";
CodeGenTarget Target;
@@ -45,7 +46,7 @@ void InstrInfoEmitter::runEnums(std::ostream &OS) {
OS << " };\n";
if (!Namespace.empty())
OS << "}\n";
- EmitSourceFileTail(OS);
+ OS << "} // End llvm namespace \n";
}
void InstrInfoEmitter::printDefList(ListInit *LI, const std::string &Name,
@@ -63,6 +64,8 @@ void InstrInfoEmitter::printDefList(ListInit *LI, const std::string &Name,
// run - Emit the main instruction description records for the target...
void InstrInfoEmitter::run(std::ostream &OS) {
EmitSourceFileHeader("Target Instruction Descriptors", OS);
+ OS << "namespace llvm {\n\n";
+
CodeGenTarget Target;
const std::string &TargetName = Target.getName();
Record *InstrInfo = Target.getInstructionSet();
@@ -92,7 +95,7 @@ void InstrInfoEmitter::run(std::ostream &OS) {
if (II->second.TheDef != PHI)
emitRecord(II->second, ++i, InstrInfo, OS);
OS << "};\n";
- EmitSourceFileTail(OS);
+ OS << "} // End llvm namespace \n";
}
void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num,
diff --git a/utils/TableGen/InstrSelectorEmitter.cpp b/utils/TableGen/InstrSelectorEmitter.cpp
index 5fb83c8755..f6ca2a22e4 100644
--- a/utils/TableGen/InstrSelectorEmitter.cpp
+++ b/utils/TableGen/InstrSelectorEmitter.cpp
@@ -982,6 +982,7 @@ void InstrSelectorEmitter::run(std::ostream &OS) {
EmitSourceFileHeader("Instruction Selector for the " + Target.getName() +
" target", OS);
+ OS << "namespace llvm {\n\n";
// Output the slot number enums...
OS << "\nenum { // Slot numbers...\n"
@@ -1291,6 +1292,5 @@ void InstrSelectorEmitter::run(std::ostream &OS) {
<< " }\n\n N->addValue(Val); // Do not ever recalculate this\n"
<< " return Val;\n}\n\n";
}
- EmitSourceFileTail(OS);
+ OS << "} // End llvm namespace \n";
}
-
diff --git a/utils/TableGen/RegisterInfoEmitter.cpp b/utils/TableGen/RegisterInfoEmitter.cpp
index b8f79c9d93..4ed1a0fe8c 100644
--- a/utils/TableGen/RegisterInfoEmitter.cpp
+++ b/utils/TableGen/RegisterInfoEmitter.cpp
@@ -29,6 +29,7 @@ void RegisterInfoEmitter::runEnums(std::ostream &OS) {
std::string Namespace = Registers[0].TheDef->getValueAsString("Namespace");
EmitSourceFileHeader("Target Register Enum Values", OS);
+ OS << "namespace llvm {\n\n";
if (!Namespace.empty())
OS << "namespace " << Namespace << " {\n";
@@ -40,7 +41,7 @@ void RegisterInfoEmitter::runEnums(std::ostream &OS) {
OS << " };\n";
if (!Namespace.empty())
OS << "}\n";
- EmitSourceFileTail(OS);
+ OS << "} // End llvm namespace \n";
}
void RegisterInfoEmitter::runHeader(std::ostream &OS) {
@@ -51,6 +52,8 @@ void RegisterInfoEmitter::runHeader(std::ostream &OS) {
OS << "#include \"llvm/Target/MRegisterInfo.h\"\n\n";
+ OS << "namespace llvm {\n\n";
+
OS << "struct " << ClassName << " : public MRegisterInfo {\n"
<< " " << ClassName
<< "(int CallFrameSetupOpcode = -1, int CallFrameDestroyOpcode = -1);\n"
@@ -67,7 +70,7 @@ void RegisterInfoEmitter::runHeader(std::ostream &OS) {
OS << " extern TargetRegisterClass *" << Name << "RegisterClass;\n";
}
OS << "} // end of namespace " << TargetName << "\n\n";
- EmitSourceFileTail(OS);
+ OS << "} // End llvm namespace \n";
}
// RegisterInfoEmitter::run - Main register file description emitter.
@@ -76,6 +79,8 @@ void RegisterInfoEmitter::run(std::ostream &OS) {
CodeGenTarget Target;
EmitSourceFileHeader("Register Information Source Fragment", OS);
+ OS << "namespace llvm {\n\n";
+
// Start out by emitting each of the register classes... to do this, we build
// a set of registers which belong to a register class, this is to ensure that
// each register is only in a single register class.
@@ -236,5 +241,5 @@ void RegisterInfoEmitter::run(std::ostream &OS) {
for (unsigned i = 0, e = CSR.size(); i != e; ++i)
OS << getQualifiedName(CSR[i]) << ", ";
OS << " 0\n };\n return CalleeSaveRegs;\n}\n\n";
- EmitSourceFileTail(OS);
+ OS << "} // End llvm namespace \n";
}
diff --git a/utils/TableGen/TableGenBackend.cpp b/utils/TableGen/TableGenBackend.cpp
index b98ff0a424..3e418f6ce6 100644
--- a/utils/TableGen/TableGenBackend.cpp
+++ b/utils/TableGen/TableGenBackend.cpp
@@ -21,11 +21,7 @@ void TableGenBackend::EmitSourceFileHeader(const std::string &Desc,
OS << "//===- TableGen'erated file -------------------------------------*-"
" C++ -*-===//\n//\n// " << Desc << "\n//\n// Automatically generate"
"d file, do not edit!\n//\n//===------------------------------------"
- "----------------------------------===//\n\nnamespace llvm {\n\n";
-}
-
-void TableGenBackend::EmitSourceFileTail( std::ostream& OS ) const {
- OS << "} // End llvm namespace \n";
+ "----------------------------------===//\n\n";
}
/// getQualifiedName - Return the name of the specified record, with a
diff --git a/utils/TableGen/TableGenBackend.h b/utils/TableGen/TableGenBackend.h
index 869d7e939d..deeb385f69 100644
--- a/utils/TableGen/TableGenBackend.h
+++ b/utils/TableGen/TableGenBackend.h
@@ -36,10 +36,6 @@ public: // Useful helper routines...
/// ostream.
void EmitSourceFileHeader(const std::string &Desc, std::ostream &OS) const;
- /// EmitSourceFileTail - Output an LLVm styelf ile tail to the specified
- /// ostream.
- void EmitSourceFileTail( std::ostream& OS ) const;
-
/// getQualifiedName - Return the name of the specified record, with a
/// namespace qualifier if the record contains one.
std::string getQualifiedName(Record *R) const;