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| author | Daniel Dunbar <daniel@zuster.org> | 2010-05-20 20:20:32 +0000 |
|---|---|---|
| committer | Daniel Dunbar <daniel@zuster.org> | 2010-05-20 20:20:32 +0000 |
| commit | 4072886a690a853c57c79a87a6423a7bfe0ce61f (patch) | |
| tree | c984ece9fc7295769df2fa262ef47ec77c31feb3 /utils/TableGen | |
| parent | c6519f916b5922de81c53547fd21364994195a70 (diff) | |
| download | llvm-4072886a690a853c57c79a87a6423a7bfe0ce61f.tar.gz llvm-4072886a690a853c57c79a87a6423a7bfe0ce61f.tar.bz2 llvm-4072886a690a853c57c79a87a6423a7bfe0ce61f.tar.xz | |
tblgen/Target: Add a isAsmParserOnly bit, and teach the disassembler to honor
it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104270 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen')
| -rw-r--r-- | utils/TableGen/X86RecognizableInstr.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/utils/TableGen/X86RecognizableInstr.cpp b/utils/TableGen/X86RecognizableInstr.cpp index 94ed15b0c3..b7085ae6c7 100644 --- a/utils/TableGen/X86RecognizableInstr.cpp +++ b/utils/TableGen/X86RecognizableInstr.cpp @@ -230,6 +230,10 @@ void RecognizableInstr::processInstr(DisassemblerTables &tables, const CodeGenInstruction &insn, InstrUID uid) { + // Ignore "asm parser only" instructions. + if (insn.TheDef->getValueAsBit("isAsmParserOnly")) + return; + RecognizableInstr recogInstr(tables, insn, uid); recogInstr.emitInstructionSpecifier(tables); |