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authorBill Wendling <isanbard@gmail.com>2011-06-14 03:17:20 +0000
committerBill Wendling <isanbard@gmail.com>2011-06-14 03:17:20 +0000
commit740e5b3586a474f1cea371cf6f652850e5420b90 (patch)
tree9f16c545b1ec0afa2c7f58ec9ddd923db1d5e42d /utils/TableGen
parent410eac553600d33ea5535dc4c906eadd8d4b593a (diff)
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Heuristic: If the number of operands in the alias are more than the number of
operands in the aliasee, don't print the alias. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132963 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen')
-rw-r--r--utils/TableGen/AsmWriterEmitter.cpp34
1 files changed, 25 insertions, 9 deletions
diff --git a/utils/TableGen/AsmWriterEmitter.cpp b/utils/TableGen/AsmWriterEmitter.cpp
index e6deb6908e..3eedf10f7c 100644
--- a/utils/TableGen/AsmWriterEmitter.cpp
+++ b/utils/TableGen/AsmWriterEmitter.cpp
@@ -830,10 +830,26 @@ void AsmWriterEmitter::EmitRegIsInRegClass(raw_ostream &O) {
O << "}\n\n";
}
+static unsigned CountNumOperands(StringRef AsmString) {
+ unsigned NumOps = 0;
+ std::pair<StringRef, StringRef> ASM = AsmString.split(' ');
+
+ while (!ASM.second.empty()) {
+ ++NumOps;
+ ASM = ASM.second.split(' ');
+ }
+
+ return NumOps;
+}
+
+
void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
CodeGenTarget Target(Records);
Record *AsmWriter = Target.getAsmWriter();
+ if (!AsmWriter->getValueAsBit("isMCAsmWriter"))
+ return;
+
O << "\n#ifdef PRINT_ALIAS_INSTR\n";
O << "#undef PRINT_ALIAS_INSTR\n\n";
@@ -842,9 +858,6 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
// Emit the method that prints the alias instruction.
std::string ClassName = AsmWriter->getValueAsString("AsmWriterClassName");
- bool isMC = AsmWriter->getValueAsBit("isMCAsmWriter");
- const char *MachineInstrClassName = isMC ? "MCInst" : "MachineInstr";
-
std::vector<Record*> AllInstAliases =
Records.getAllDerivedDefinitions("InstAlias");
@@ -873,13 +886,16 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
for (std::vector<CodeGenInstAlias*>::iterator
II = Aliases.begin(), IE = Aliases.end(); II != IE; ++II) {
const CodeGenInstAlias *CGA = *II;
+ unsigned LastOpNo = CGA->ResultInstOperandIndex.size();
+
+ // Don't emit the alias if it has more operands than what it's aliasing.
+ if (LastOpNo < CountNumOperands(CGA->AsmString))
+ continue;
+
IAPrinter *IAP = new IAPrinter(AWI, CGA->Result->getAsString(),
CGA->AsmString);
-
IAP->addReqFeatures(CGA->TheDef->getValueAsListOfDefs("Predicates"));
- unsigned LastOpNo = CGA->ResultInstOperandIndex.size();
-
std::string Cond;
Cond = std::string("MI->getNumOperands() == ") + llvm::utostr(LastOpNo);
IAP->addCond(Cond);
@@ -914,7 +930,7 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
}
} else {
assert(Rec->isSubClassOf("Operand") && "Unexpected operand!");
- // FIXME: We need to handle these situations.
+ // FIXME: We may need to handle these situations.
delete IAP;
IAP = 0;
CantHandle = true;
@@ -952,7 +968,7 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
raw_string_ostream HeaderO(Header);
HeaderO << "bool " << Target.getName() << ClassName
- << "::printAliasInstr(const " << MachineInstrClassName
+ << "::printAliasInstr(const MCInst"
<< " *MI, raw_ostream &OS) {\n";
std::string Cases;
@@ -995,7 +1011,7 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
CasesO.indent(4) << "return false;\n";
}
- if (CasesO.str().empty() || !isMC) {
+ if (CasesO.str().empty()) {
O << HeaderO.str();
O << " return false;\n";
O << "}\n\n";