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| author | Dan Gohman <gohman@apple.com> | 2007-06-26 00:48:07 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2007-06-26 00:48:07 +0000 |
| commit | d45eddd214061bf12ad1e6b86497a41725e61d75 (patch) | |
| tree | 3d8ab1885d70f83c2b648cf77dc11710177e246b /utils/TableGen | |
| parent | 9a0930dbd99af7958ef24bb4887ae6b1e294532f (diff) | |
| download | llvm-d45eddd214061bf12ad1e6b86497a41725e61d75.tar.gz llvm-d45eddd214061bf12ad1e6b86497a41725e61d75.tar.bz2 llvm-d45eddd214061bf12ad1e6b86497a41725e61d75.tar.xz | |
Revert the earlier change that removed the M_REMATERIALIZABLE machine
instruction flag, and use the flag along with a virtual member function
hook for targets to override if there are instructions that are only
trivially rematerializable with specific operands (i.e. constant pool
loads).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37728 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen')
| -rw-r--r-- | utils/TableGen/CodeGenInstruction.h | 1 | ||||
| -rw-r--r-- | utils/TableGen/CodeGenTarget.cpp | 1 | ||||
| -rw-r--r-- | utils/TableGen/InstrInfoEmitter.cpp | 1 |
3 files changed, 3 insertions, 0 deletions
diff --git a/utils/TableGen/CodeGenInstruction.h b/utils/TableGen/CodeGenInstruction.h index 4f76de8f35..54d9b3fea7 100644 --- a/utils/TableGen/CodeGenInstruction.h +++ b/utils/TableGen/CodeGenInstruction.h @@ -91,6 +91,7 @@ namespace llvm { bool isConvertibleToThreeAddress; bool isCommutable; bool isTerminator; + bool isReMaterializable; bool hasDelaySlot; bool usesCustomDAGSchedInserter; bool hasVariableNumberOfOperands; diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp index b02c423ad7..c54ecd02e4 100644 --- a/utils/TableGen/CodeGenTarget.cpp +++ b/utils/TableGen/CodeGenTarget.cpp @@ -365,6 +365,7 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr) isConvertibleToThreeAddress = R->getValueAsBit("isConvertibleToThreeAddress"); isCommutable = R->getValueAsBit("isCommutable"); isTerminator = R->getValueAsBit("isTerminator"); + isReMaterializable = R->getValueAsBit("isReMaterializable"); hasDelaySlot = R->getValueAsBit("hasDelaySlot"); usesCustomDAGSchedInserter = R->getValueAsBit("usesCustomDAGSchedInserter"); hasCtrlDep = R->getValueAsBit("hasCtrlDep"); diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp index bf027dd29a..af01e4cd75 100644 --- a/utils/TableGen/InstrInfoEmitter.cpp +++ b/utils/TableGen/InstrInfoEmitter.cpp @@ -240,6 +240,7 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num, if (Inst.isConvertibleToThreeAddress) OS << "|M_CONVERTIBLE_TO_3_ADDR"; if (Inst.isCommutable) OS << "|M_COMMUTABLE"; if (Inst.isTerminator) OS << "|M_TERMINATOR_FLAG"; + if (Inst.isReMaterializable) OS << "|M_REMATERIALIZIBLE"; if (Inst.clobbersPred) OS << "|M_CLOBBERS_PRED"; if (Inst.isNotDuplicable) OS << "|M_NOT_DUPLICABLE"; if (Inst.usesCustomDAGSchedInserter) |