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authorEvan Cheng <evan.cheng@apple.com>2010-05-13 23:55:47 +0000
committerEvan Cheng <evan.cheng@apple.com>2010-05-13 23:55:47 +0000
commitdbf67fefeaccfeb53fb9d6098180ba1f29e682d5 (patch)
treea91c18e3ed4b935d71fc65b4a2342bb28ffc674f /utils/TableGen
parenta5afa1cb214146fd270c86f606b634c8ed6682f2 (diff)
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Adding a v8i64 512-bit vector type. This will be used to model ARM NEON intrinsics which translate into a pair of vld / vst instructions that can load / store 8 consecutive 64-bit (D) registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103746 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen')
-rw-r--r--utils/TableGen/CodeGenTarget.cpp1
1 files changed, 1 insertions, 0 deletions
diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp
index 1efe2ff080..f13f969dd3 100644
--- a/utils/TableGen/CodeGenTarget.cpp
+++ b/utils/TableGen/CodeGenTarget.cpp
@@ -80,6 +80,7 @@ std::string llvm::getEnumName(MVT::SimpleValueType T) {
case MVT::v1i64: return "MVT::v1i64";
case MVT::v2i64: return "MVT::v2i64";
case MVT::v4i64: return "MVT::v4i64";
+ case MVT::v8i64: return "MVT::v8i64";
case MVT::v2f32: return "MVT::v2f32";
case MVT::v4f32: return "MVT::v4f32";
case MVT::v8f32: return "MVT::v8f32";