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| author | Sean Silva <silvas@purdue.edu> | 2012-09-19 01:47:01 +0000 |
|---|---|---|
| committer | Sean Silva <silvas@purdue.edu> | 2012-09-19 01:47:01 +0000 |
| commit | decfdf548b43c80c3dd81ff1cc3639b80ed33a3e (patch) | |
| tree | 93d0a0732c11cfc66ff6e299e513ecfa06daafb0 /utils/TableGen | |
| parent | 90fee07298bec2e5160a599db850b9553d02377b (diff) | |
| download | llvm-decfdf548b43c80c3dd81ff1cc3639b80ed33a3e.tar.gz llvm-decfdf548b43c80c3dd81ff1cc3639b80ed33a3e.tar.bz2 llvm-decfdf548b43c80c3dd81ff1cc3639b80ed33a3e.tar.xz | |
Iterate deterministically over register classes
Fixes an observed instance of nondeterministic TableGen output.
Review by Jakob.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164190 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen')
| -rw-r--r-- | utils/TableGen/AsmMatcherEmitter.cpp | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/utils/TableGen/AsmMatcherEmitter.cpp b/utils/TableGen/AsmMatcherEmitter.cpp index 89cc1380c3..b8deba384b 100644 --- a/utils/TableGen/AsmMatcherEmitter.cpp +++ b/utils/TableGen/AsmMatcherEmitter.cpp @@ -599,7 +599,8 @@ public: std::vector<OperandMatchEntry> OperandMatchInfo; /// Map of Register records to their class information. - std::map<Record*, ClassInfo*> RegisterClasses; + typedef std::map<Record*, ClassInfo*, LessRecordByID> RegisterClassesTy; + RegisterClassesTy RegisterClasses; /// Map of Predicate records to their subtarget information. std::map<Record*, SubtargetFeatureInfo*> SubtargetFeatures; @@ -2043,7 +2044,7 @@ static void emitValidateOperandClass(AsmMatcherInfo &Info, OS << " MatchClassKind OpKind;\n"; OS << " switch (Operand.getReg()) {\n"; OS << " default: OpKind = InvalidMatchClass; break;\n"; - for (std::map<Record*, ClassInfo*>::iterator + for (AsmMatcherInfo::RegisterClassesTy::iterator it = Info.RegisterClasses.begin(), ie = Info.RegisterClasses.end(); it != ie; ++it) OS << " case " << Info.Target.getName() << "::" |