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authorJakob Stoklund Olesen <stoklund@2pi.dk>2012-05-03 22:49:00 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2012-05-03 22:49:00 +0000
commit1a2a19dd3ce2b163837b5f0a1ea474c72527cad6 (patch)
treec990648cb2c4a048f0e99c9e71c1988705ce5fb2 /utils
parent6a0ed18532425d637ecc1cc851c559db446ec4e8 (diff)
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Add TargetRegisterClass::getSuperRegIndices().
This is a pointer into one of the tables used by getMatchingSuperRegClass(). It makes it possible to use a shared implementation of that function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156121 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils')
-rw-r--r--utils/TableGen/RegisterInfoEmitter.cpp8
1 files changed, 4 insertions, 4 deletions
diff --git a/utils/TableGen/RegisterInfoEmitter.cpp b/utils/TableGen/RegisterInfoEmitter.cpp
index 48bcca706a..6769892db4 100644
--- a/utils/TableGen/RegisterInfoEmitter.cpp
+++ b/utils/TableGen/RegisterInfoEmitter.cpp
@@ -845,7 +845,7 @@ RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target,
//
// The 0-terminated list of subreg indices starts at:
//
- // SuperRegIdxSeqs + SuperRegIdxOffset[RC]
+ // RC->getSuperRegIndices() = SuperRegIdxSeqs + ...
//
// The corresponding bitmasks follow the sub-class mask in memory. Each
// mask has RCMaskWords uint32_t entries.
@@ -946,7 +946,8 @@ RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target,
<< '&' << Target.getName() << "MCRegisterClasses[" << RC.getName()
<< "RegClassID],\n "
<< "VTLists + " << VTSeqs.get(RC.VTs) << ",\n "
- << RC.getName() << "SubClassMask,\n ";
+ << RC.getName() << "SubClassMask,\n SuperRegIdxSeqs + "
+ << SuperRegIdxSeqs.get(SuperRegIdxLists[i]) << ",\n ";
if (RC.getSuperClasses().empty())
OS << "NullRegClasses,\n ";
else
@@ -1062,8 +1063,7 @@ RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target,
<< " assert(A && B && \"Missing regclass\");\n"
<< " assert(Idx && Idx <= " << SubRegIndices.size()
<< " && \"Bad subreg\");\n"
- << " const uint16_t *SRI = SuperRegIdxSeqs + "
- "SuperRegIdxOffset[B->getID()];\n"
+ << " const uint16_t *SRI = B->getSuperRegIndices();\n"
<< " unsigned Offset = 0;\n"
<< " while (SRI[Offset] != Idx) {\n"
<< " if (!SRI[Offset])\n return 0;\n"