summaryrefslogtreecommitdiff
path: root/utils
diff options
context:
space:
mode:
authorAhmed Bougacha <ahmed.bougacha@gmail.com>2013-05-31 23:45:26 +0000
committerAhmed Bougacha <ahmed.bougacha@gmail.com>2013-05-31 23:45:26 +0000
commit23ed37a6b76e79272194fb46597f7280661b828f (patch)
treea2c447458a013a1f1bcbdc84d43fe3c55c416a0d /utils
parentcd8e3c4dcf4383b8b1c16827c6326f6e9bc49d51 (diff)
downloadllvm-23ed37a6b76e79272194fb46597f7280661b828f.tar.gz
llvm-23ed37a6b76e79272194fb46597f7280661b828f.tar.bz2
llvm-23ed37a6b76e79272194fb46597f7280661b828f.tar.xz
Make SubRegIndex size mandatory, following r183020.
This also makes TableGen able to compute sizes/offsets of synthesized indices representing tuples. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183061 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils')
-rw-r--r--utils/TableGen/CodeGenRegisters.cpp15
-rw-r--r--utils/TableGen/CodeGenRegisters.h6
-rw-r--r--utils/TableGen/RegisterInfoEmitter.cpp4
3 files changed, 18 insertions, 7 deletions
diff --git a/utils/TableGen/CodeGenRegisters.cpp b/utils/TableGen/CodeGenRegisters.cpp
index 3eed3ffb5f..daa7eab658 100644
--- a/utils/TableGen/CodeGenRegisters.cpp
+++ b/utils/TableGen/CodeGenRegisters.cpp
@@ -1092,11 +1092,24 @@ getConcatSubRegIndex(const SmallVector<CodeGenSubRegIndex*, 8> &Parts) {
// None exists, synthesize one.
std::string Name = Parts.front()->getName();
+ // Determine whether all parts are contiguous.
+ bool isContinuous = true;
+ unsigned Size = Parts.front()->Size;
+ unsigned LastOffset = Parts.front()->Offset;
+ unsigned LastSize = Parts.front()->Size;
for (unsigned i = 1, e = Parts.size(); i != e; ++i) {
Name += '_';
Name += Parts[i]->getName();
+ Size += Parts[i]->Size;
+ if (Parts[i]->Offset != (LastOffset + LastSize))
+ isContinuous = false;
+ LastOffset = Parts[i]->Offset;
+ LastSize = Parts[i]->Size;
}
- return Idx = createSubRegIndex(Name, Parts.front()->getNamespace());
+ Idx = createSubRegIndex(Name, Parts.front()->getNamespace());
+ Idx->Size = Size;
+ Idx->Offset = isContinuous ? Parts.front()->Offset : -1;
+ return Idx;
}
void CodeGenRegBank::computeComposites() {
diff --git a/utils/TableGen/CodeGenRegisters.h b/utils/TableGen/CodeGenRegisters.h
index c83455149a..f9edc6553a 100644
--- a/utils/TableGen/CodeGenRegisters.h
+++ b/utils/TableGen/CodeGenRegisters.h
@@ -37,10 +37,10 @@ namespace llvm {
Record *const TheDef;
std::string Name;
std::string Namespace;
- uint16_t Size;
- uint16_t Offset;
public:
+ uint16_t Size;
+ uint16_t Offset;
const unsigned EnumValue;
unsigned LaneMask;
@@ -54,8 +54,6 @@ namespace llvm {
const std::string &getName() const { return Name; }
const std::string &getNamespace() const { return Namespace; }
std::string getQualifiedName() const;
- uint16_t getSize() const { return Size; }
- uint16_t getOffset() const { return Offset; }
// Order CodeGenSubRegIndex pointers by EnumValue.
struct Less {
diff --git a/utils/TableGen/RegisterInfoEmitter.cpp b/utils/TableGen/RegisterInfoEmitter.cpp
index 9978237a18..1a6cc3a01c 100644
--- a/utils/TableGen/RegisterInfoEmitter.cpp
+++ b/utils/TableGen/RegisterInfoEmitter.cpp
@@ -798,8 +798,8 @@ RegisterInfoEmitter::runMCDesc(raw_ostream &OS, CodeGenTarget &Target,
for (ArrayRef<CodeGenSubRegIndex*>::const_iterator
SRI = SubRegIndices.begin(), SRE = SubRegIndices.end();
SRI != SRE; ++SRI) {
- OS << " { " << (*SRI)->getOffset() << ", "
- << (*SRI)->getSize()
+ OS << " { " << (*SRI)->Offset << ", "
+ << (*SRI)->Size
<< " },\t// " << (*SRI)->getName() << "\n";
}
OS << "};\n\n";