diff options
author | Craig Topper <craig.topper@gmail.com> | 2014-04-30 05:53:35 +0000 |
---|---|---|
committer | Craig Topper <craig.topper@gmail.com> | 2014-04-30 05:53:35 +0000 |
commit | 25d437f45da9d078156a47340df5151badadbff5 (patch) | |
tree | c9dbddcdc74c81746d16cb30aef6001d24e2e9f4 /utils | |
parent | c6b062010119b157ca4c2a798471416b90dee3a6 (diff) | |
download | llvm-25d437f45da9d078156a47340df5151badadbff5.tar.gz llvm-25d437f45da9d078156a47340df5151badadbff5.tar.bz2 llvm-25d437f45da9d078156a47340df5151badadbff5.tar.xz |
[C++11] Use 'nullptr' in tablegen output files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207611 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils')
-rw-r--r-- | utils/TableGen/InstrInfoEmitter.cpp | 10 | ||||
-rw-r--r-- | utils/TableGen/RegisterInfoEmitter.cpp | 10 | ||||
-rw-r--r-- | utils/TableGen/SubtargetEmitter.cpp | 2 |
3 files changed, 11 insertions, 11 deletions
diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp index afc05b6009..76f05cea3f 100644 --- a/utils/TableGen/InstrInfoEmitter.cpp +++ b/utils/TableGen/InstrInfoEmitter.cpp @@ -523,20 +523,20 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num, // Emit the implicit uses and defs lists... std::vector<Record*> UseList = Inst.TheDef->getValueAsListOfDefs("Uses"); if (UseList.empty()) - OS << "NULL, "; + OS << "nullptr, "; else OS << "ImplicitList" << EmittedLists[UseList] << ", "; std::vector<Record*> DefList = Inst.TheDef->getValueAsListOfDefs("Defs"); if (DefList.empty()) - OS << "NULL, "; + OS << "nullptr, "; else OS << "ImplicitList" << EmittedLists[DefList] << ", "; // Emit the operand info. std::vector<std::string> OperandInfo = GetOperandInfo(Inst); if (OperandInfo.empty()) - OS << "0"; + OS << "nullptr"; else OS << "OperandInfo" << OpInfo.find(OperandInfo)->second; @@ -548,10 +548,10 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num, else if (!Inst.DeprecatedReason.empty()) // Emit the Subtarget feature. OS << "," << Target.getInstNamespace() << "::" << Inst.DeprecatedReason - << ",0"; + << ",nullptr"; else // Instruction isn't deprecated. - OS << ",0,0"; + OS << ",0,nullptr"; OS << " }, // Inst #" << Num << " = " << Inst.TheDef->getName() << "\n"; } diff --git a/utils/TableGen/RegisterInfoEmitter.cpp b/utils/TableGen/RegisterInfoEmitter.cpp index bc252a9bde..573c37f4ee 100644 --- a/utils/TableGen/RegisterInfoEmitter.cpp +++ b/utils/TableGen/RegisterInfoEmitter.cpp @@ -225,7 +225,7 @@ EmitRegUnitPressure(raw_ostream &OS, const CodeGenRegBank &RegBank, for (unsigned i = 0; i < NumSets; ++i ) { OS << " \"" << RegBank.getRegSetAt(i).Name << "\",\n"; } - OS << " 0 };\n" + OS << " nullptr };\n" << " return PressureNameTable[Idx];\n" << "}\n\n"; @@ -1068,7 +1068,7 @@ RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target, // Now that all of the structs have been emitted, emit the instances. if (!RegisterClasses.empty()) { OS << "\nstatic const TargetRegisterClass *const " - << "NullRegClasses[] = { NULL };\n\n"; + << "NullRegClasses[] = { nullptr };\n\n"; // Emit register class bit mask tables. The first bit mask emitted for a // register class, RC, is the set of sub-classes, including RC itself. @@ -1135,7 +1135,7 @@ RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target, << RC.getName() << "Superclasses[] = {\n"; for (unsigned i = 0; i != Supers.size(); ++i) OS << " &" << Supers[i]->getQualifiedName() << "RegClass,\n"; - OS << " NULL\n};\n\n"; + OS << " nullptr\n};\n\n"; } // Emit methods. @@ -1189,7 +1189,7 @@ RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target, else OS << RC.getName() << "Superclasses,\n "; if (RC.AltOrderSelect.empty()) - OS << "0\n"; + OS << "nullptr\n"; else OS << RC.getName() << "GetRawAllocationOrder\n"; OS << " };\n\n"; @@ -1258,7 +1258,7 @@ RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target, << " if (!Idx) return RC;\n --Idx;\n" << " assert(Idx < " << SubRegIndices.size() << " && \"Bad subreg\");\n" << " unsigned TV = Table[RC->getID()][Idx];\n" - << " return TV ? getRegClass(TV - 1) : 0;\n}\n\n"; + << " return TV ? getRegClass(TV - 1) : nullptr;\n}\n\n"; } EmitRegUnitPressure(OS, RegBank, ClassName); diff --git a/utils/TableGen/SubtargetEmitter.cpp b/utils/TableGen/SubtargetEmitter.cpp index 39130bde06..846a485959 100644 --- a/utils/TableGen/SubtargetEmitter.cpp +++ b/utils/TableGen/SubtargetEmitter.cpp @@ -578,7 +578,7 @@ EmitItineraries(raw_ostream &OS, OS << "\n"; OS << "static const llvm::InstrItinerary "; if (ItinList.empty()) { - OS << '*' << Name << " = 0;\n"; + OS << '*' << Name << " = nullptr;\n"; continue; } |