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author | Joerg Sonnenberger <joerg@bec.de> | 2011-04-04 16:58:13 +0000 |
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committer | Joerg Sonnenberger <joerg@bec.de> | 2011-04-04 16:58:13 +0000 |
commit | 4a8ac8de1ddfeaadb9ff13ce361bfc6435f18028 (patch) | |
tree | 26398343e8cf8d6c9382cb7ce62fcb34a9396fa2 /utils | |
parent | 39d7caea6938536e5528a76b28461000765a7556 (diff) | |
download | llvm-4a8ac8de1ddfeaadb9ff13ce361bfc6435f18028.tar.gz llvm-4a8ac8de1ddfeaadb9ff13ce361bfc6435f18028.tar.bz2 llvm-4a8ac8de1ddfeaadb9ff13ce361bfc6435f18028.tar.xz |
Add support for the VIA PadLock instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128826 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils')
-rw-r--r-- | utils/TableGen/DisassemblerEmitter.cpp | 12 | ||||
-rw-r--r-- | utils/TableGen/X86DisassemblerTables.cpp | 2 | ||||
-rw-r--r-- | utils/TableGen/X86DisassemblerTables.h | 9 | ||||
-rw-r--r-- | utils/TableGen/X86RecognizableInstr.cpp | 18 |
4 files changed, 31 insertions, 10 deletions
diff --git a/utils/TableGen/DisassemblerEmitter.cpp b/utils/TableGen/DisassemblerEmitter.cpp index 90a2af21f3..d68d3b00e6 100644 --- a/utils/TableGen/DisassemblerEmitter.cpp +++ b/utils/TableGen/DisassemblerEmitter.cpp @@ -40,12 +40,12 @@ using namespace llvm::X86Disassembler; /// all cases as a 64-bit instruction with only OPSIZE set. (The XS prefix /// may have effects on its execution, but does not change the instruction /// returned.) This allows considerable space savings in other tables. -/// - Four tables (ONEBYTE_SYM, TWOBYTE_SYM, THREEBYTE38_SYM, and -/// THREEBYTE3A_SYM) contain the hierarchy that the decoder traverses while -/// decoding an instruction. At the lowest level of this hierarchy are -/// instruction UIDs, 16-bit integers that can be used to uniquely identify -/// the instruction and correspond exactly to its position in the list of -/// CodeGenInstructions for the target. +/// - Six tables (ONEBYTE_SYM, TWOBYTE_SYM, THREEBYTE38_SYM, THREEBYTE3A_SYM, +/// THREEBYTEA6_SYM, and THREEBYTEA7_SYM contain the hierarchy that the +/// decoder traverses while decoding an instruction. At the lowest level of +/// this hierarchy are instruction UIDs, 16-bit integers that can be used to +/// uniquely identify the instruction and correspond exactly to its position +/// in the list of CodeGenInstructions for the target. /// - One table (INSTRUCTIONS_SYM) contains information about the operands of /// each instruction and how to decode them. /// diff --git a/utils/TableGen/X86DisassemblerTables.cpp b/utils/TableGen/X86DisassemblerTables.cpp index cbd02339c2..74310593d2 100644 --- a/utils/TableGen/X86DisassemblerTables.cpp +++ b/utils/TableGen/X86DisassemblerTables.cpp @@ -566,6 +566,8 @@ void DisassemblerTables::emitContextDecisions(raw_ostream &o1, emitContextDecision(o1, o2, i1, i2, *Tables[1], TWOBYTE_STR); emitContextDecision(o1, o2, i1, i2, *Tables[2], THREEBYTE38_STR); emitContextDecision(o1, o2, i1, i2, *Tables[3], THREEBYTE3A_STR); + emitContextDecision(o1, o2, i1, i2, *Tables[4], THREEBYTEA6_STR); + emitContextDecision(o1, o2, i1, i2, *Tables[5], THREEBYTEA7_STR); } void DisassemblerTables::emit(raw_ostream &o) const { diff --git a/utils/TableGen/X86DisassemblerTables.h b/utils/TableGen/X86DisassemblerTables.h index 08eba019c0..fe4ad6f00d 100644 --- a/utils/TableGen/X86DisassemblerTables.h +++ b/utils/TableGen/X86DisassemblerTables.h @@ -39,7 +39,9 @@ private: /// [1] two-byte opcodes of the form 0f __ /// [2] three-byte opcodes of the form 0f 38 __ /// [3] three-byte opcodes of the form 0f 3a __ - ContextDecision* Tables[4]; + /// [4] three-byte opcodes of the form 0f a6 __ + /// [5] three-byte opcodes of the form 0f a7 __ + ContextDecision* Tables[6]; /// The instruction information table std::vector<InstructionSpecifier> InstructionSpecifiers; @@ -141,8 +143,9 @@ private: /// } /// } /// - /// NAME is the name of the ContextDecision (typically one of the four names - /// ONEBYTE_SYM, TWOBYTE_SYM, THREEBYTE38_SYM, and THREEBYTE3A_SYM from + /// NAME is the name of the ContextDecision (typically one of the four names + /// ONEBYTE_SYM, TWOBYTE_SYM, THREEBYTE38_SYM, THREEBYTE3A_SYM, + /// THREEBYTEA6_SYM, and THREEBYTEA7_SYM from /// X86DisassemblerDecoderCommon.h). /// IC is one of the contexts in InstructionContext. There is an opcode /// decision for each possible context. diff --git a/utils/TableGen/X86RecognizableInstr.cpp b/utils/TableGen/X86RecognizableInstr.cpp index 805cae7b3e..f7518a988c 100644 --- a/utils/TableGen/X86RecognizableInstr.cpp +++ b/utils/TableGen/X86RecognizableInstr.cpp @@ -68,7 +68,7 @@ namespace X86Local { DC = 7, DD = 8, DE = 9, DF = 10, XD = 11, XS = 12, T8 = 13, P_TA = 14, - P_0F_AE = 16, P_0F_01 = 17 + A6 = 15, A7 = 16 }; } @@ -796,6 +796,22 @@ void RecognizableInstr::emitDecodePath(DisassemblerTables &tables) const { filter = new DumbFilter(); opcodeToSet = Opcode; break; + case X86Local::A6: + opcodeType = THREEBYTE_A6; + if (needsModRMForDecode(Form)) + filter = new ModFilter(isRegFormat(Form)); + else + filter = new DumbFilter(); + opcodeToSet = Opcode; + break; + case X86Local::A7: + opcodeType = THREEBYTE_A7; + if (needsModRMForDecode(Form)) + filter = new ModFilter(isRegFormat(Form)); + else + filter = new DumbFilter(); + opcodeToSet = Opcode; + break; case X86Local::D8: case X86Local::D9: case X86Local::DA: |