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| author | Benjamin Kramer <benny.kra@googlemail.com> | 2012-03-01 18:16:35 +0000 |
|---|---|---|
| committer | Benjamin Kramer <benny.kra@googlemail.com> | 2012-03-01 18:16:35 +0000 |
| commit | 4b1212b4bfac98c688d484bf22ae158875f06ad5 (patch) | |
| tree | 4a59460b707f300fa2404f64e4d13cd3ae9b1d82 /utils | |
| parent | b5372769eb3fa7ba682ea0c54ba3c0bcc8e7726e (diff) | |
| download | llvm-4b1212b4bfac98c688d484bf22ae158875f06ad5.tar.gz llvm-4b1212b4bfac98c688d484bf22ae158875f06ad5.tar.bz2 llvm-4b1212b4bfac98c688d484bf22ae158875f06ad5.tar.xz | |
Move getSubRegIndex out of generated code into MCRegisterInfo, devirtualize it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151821 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils')
| -rw-r--r-- | utils/TableGen/RegisterInfoEmitter.cpp | 11 |
1 files changed, 0 insertions, 11 deletions
diff --git a/utils/TableGen/RegisterInfoEmitter.cpp b/utils/TableGen/RegisterInfoEmitter.cpp index 5ccfad8b40..80066145b4 100644 --- a/utils/TableGen/RegisterInfoEmitter.cpp +++ b/utils/TableGen/RegisterInfoEmitter.cpp @@ -486,7 +486,6 @@ RegisterInfoEmitter::runTargetHeader(raw_ostream &OS, CodeGenTarget &Target, << "(unsigned RA, unsigned D = 0, unsigned E = 0);\n" << " virtual bool needsStackRealignment(const MachineFunction &) const\n" << " { return false; }\n" - << " unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const;\n" << " unsigned composeSubRegIndices(unsigned, unsigned) const;\n" << " const TargetRegisterClass *" "getSubClassWithSubReg(const TargetRegisterClass*, unsigned) const;\n" @@ -766,16 +765,6 @@ RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target, std::string ClassName = Target.getName() + "GenRegisterInfo"; - OS << "unsigned " << ClassName - << "::getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const {\n"; - if (SubRegIndices.size()) { - OS << " for (unsigned I = 1; I <= " << SubRegIndices.size() << "; ++I)\n" - << " if (getSubReg(RegNo, I) == SubRegNo)\n" - << " return I;\n"; - } - OS << " return 0;\n"; - OS << "}\n\n"; - // Emit composeSubRegIndices OS << "unsigned " << ClassName << "::composeSubRegIndices(unsigned IdxA, unsigned IdxB) const {\n" |