summaryrefslogtreecommitdiff
path: root/utils
diff options
context:
space:
mode:
authorBenjamin Kramer <benny.kra@googlemail.com>2013-09-11 11:22:26 +0000
committerBenjamin Kramer <benny.kra@googlemail.com>2013-09-11 11:22:26 +0000
commit71faecf16fd19eadaa42e2cb6c3b5165a9217f21 (patch)
tree98412c22fff5dc0b6cc09b7c212f3dc8b3024520 /utils
parent2ac128292150c7ebb469d137877eaa3c6d26a8bb (diff)
downloadllvm-71faecf16fd19eadaa42e2cb6c3b5165a9217f21.tar.gz
llvm-71faecf16fd19eadaa42e2cb6c3b5165a9217f21.tar.bz2
llvm-71faecf16fd19eadaa42e2cb6c3b5165a9217f21.tar.xz
llvm-tblgen: Stabilize subreg index tables.
Otherwise SequenceToOffsetTable will sort by pointer and becomes non-deterministic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190514 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils')
-rw-r--r--utils/TableGen/RegisterInfoEmitter.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/utils/TableGen/RegisterInfoEmitter.cpp b/utils/TableGen/RegisterInfoEmitter.cpp
index 9a30e159be..ee417bc737 100644
--- a/utils/TableGen/RegisterInfoEmitter.cpp
+++ b/utils/TableGen/RegisterInfoEmitter.cpp
@@ -722,7 +722,7 @@ RegisterInfoEmitter::runMCDesc(raw_ostream &OS, CodeGenTarget &Target,
// Keep track of sub-register names as well. These are not differentially
// encoded.
typedef SmallVector<const CodeGenSubRegIndex*, 4> SubRegIdxVec;
- SequenceToOffsetTable<SubRegIdxVec> SubRegIdxSeqs;
+ SequenceToOffsetTable<SubRegIdxVec, CodeGenSubRegIndex::Less> SubRegIdxSeqs;
SmallVector<SubRegIdxVec, 4> SubRegIdxLists(Regs.size());
SequenceToOffsetTable<std::string> RegStrings;
@@ -1090,7 +1090,7 @@ RegisterInfoEmitter::runTargetDesc(raw_ostream &OS, CodeGenTarget &Target,
// Compress the sub-reg index lists.
typedef std::vector<const CodeGenSubRegIndex*> IdxList;
SmallVector<IdxList, 8> SuperRegIdxLists(RegisterClasses.size());
- SequenceToOffsetTable<IdxList> SuperRegIdxSeqs;
+ SequenceToOffsetTable<IdxList, CodeGenSubRegIndex::Less> SuperRegIdxSeqs;
BitVector MaskBV(RegisterClasses.size());
for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) {