Add initial support for register and register class representation.

Obviously this is not done.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15804 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 37 insertions, 0 deletions

diff --git a/utils/TableGen/CodeGenRegisters.h b/utils/TableGen/CodeGenRegisters.h
new file mode 100644
index 0000000000..7a51001cd1
--- /dev/null
+++ b/utils/TableGen/CodeGenRegisters.h
@@ -0,0 +1,37 @@
+//===- CodeGenRegisters.h - Register and RegisterClass Info -----*- C++ -*-===//
+// 
+//                     The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// 
+//===----------------------------------------------------------------------===//
+//
+// This file defines structures to encapsulate information gleaned from the
+// target register and register class definitions.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef CODEGEN_REGISTERS_H
+#define CODEGEN_REGISTERS_H
+
+#include <string>
+
+namespace llvm {
+  class Record;
+
+  /// CodeGenRegister - Represents a register definition.
+  struct CodeGenRegister {
+    Record *TheDef;
+    const std::string &getName() const;
+    
+    CodeGenRegister(Record *R) : TheDef(R) {}
+  };
+
+
+  struct CodeGenRegisterClass {
+
+  };
+}
+
+#endif