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authorCraig Topper <craig.topper@gmail.com>2014-01-01 14:22:37 +0000
committerCraig Topper <craig.topper@gmail.com>2014-01-01 14:22:37 +0000
commit979b2cd2bc97d4d6745f4959feb7e9706a9fb9f6 (patch)
tree4e5789c17b72b7a2fa2f228b656a7e977de60e9a /utils
parent0cc6c9b3d9abc5c5a901bfa5a039b436a3c14018 (diff)
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Second attempt at Removing special form of AddRegFrm used by FP instructions. These instructions can be handled by MRMXr instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198276 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils')
-rw-r--r--utils/TableGen/X86ModRMFilters.cpp2
-rw-r--r--utils/TableGen/X86ModRMFilters.h20
-rw-r--r--utils/TableGen/X86RecognizableInstr.cpp54
3 files changed, 25 insertions, 51 deletions
diff --git a/utils/TableGen/X86ModRMFilters.cpp b/utils/TableGen/X86ModRMFilters.cpp
index a311603df9..1641613aa3 100644
--- a/utils/TableGen/X86ModRMFilters.cpp
+++ b/utils/TableGen/X86ModRMFilters.cpp
@@ -17,8 +17,6 @@ void DumbFilter::anchor() { }
void ModFilter::anchor() { }
-void AddRegEscapeFilter::anchor() { }
-
void ExtendedFilter::anchor() { }
void ExactFilter::anchor() { }
diff --git a/utils/TableGen/X86ModRMFilters.h b/utils/TableGen/X86ModRMFilters.h
index 5ab1a48846..049cfc1d3b 100644
--- a/utils/TableGen/X86ModRMFilters.h
+++ b/utils/TableGen/X86ModRMFilters.h
@@ -84,26 +84,6 @@ public:
}
};
-/// AddRegEscapeFilter - Some escape opcodes have one of the register operands
-/// added to the ModR/M byte, meaning that a range of eight ModR/M values
-/// maps to a single instruction. Such instructions require the ModR/M byte
-/// to fall between 0xc0 and 0xff.
-class AddRegEscapeFilter : public ModRMFilter {
- virtual void anchor();
- uint8_t ModRM;
-public:
- /// Constructor
- ///
- /// \param modRM The value of the ModR/M byte when the register operand
- /// refers to the first register in the register set.
- AddRegEscapeFilter(uint8_t modRM) : ModRM(modRM) {
- }
-
- bool accepts(uint8_t modRM) const {
- return (modRM >= ModRM && modRM < ModRM + 8);
- }
-};
-
/// ExtendedFilter - Extended opcodes are classified based on the value of the
/// mod field [bits 7-6] and the value of the nnn field [bits 5-3].
class ExtendedFilter : public ModRMFilter {
diff --git a/utils/TableGen/X86RecognizableInstr.cpp b/utils/TableGen/X86RecognizableInstr.cpp
index 1eb579df3f..05be1ed123 100644
--- a/utils/TableGen/X86RecognizableInstr.cpp
+++ b/utils/TableGen/X86RecognizableInstr.cpp
@@ -1075,14 +1075,9 @@ void RecognizableInstr::emitDecodePath(DisassemblerTables &tables) const {
case X86Local::DE:
case X86Local::DF:
assert(Opcode >= 0xc0 && "Unexpected opcode for an escape opcode");
+ assert(Form == X86Local::RawFrm);
opcodeType = ONEBYTE;
- if (Form == X86Local::AddRegFrm) {
- Spec->modifierType = MODIFIER_MODRM;
- Spec->modifierBase = Opcode;
- filter = new AddRegEscapeFilter(Opcode);
- } else {
- filter = new ExactFilter(Opcode);
- }
+ filter = new ExactFilter(Opcode);
opcodeToSet = 0xd8 + (Prefix - X86Local::D8);
break;
case X86Local::REP:
@@ -1130,6 +1125,16 @@ void RecognizableInstr::emitDecodePath(DisassemblerTables &tables) const {
switch (Form) {
default:
llvm_unreachable("Unhandled escape opcode form");
+ case X86Local::MRM0r:
+ case X86Local::MRM1r:
+ case X86Local::MRM2r:
+ case X86Local::MRM3r:
+ case X86Local::MRM4r:
+ case X86Local::MRM5r:
+ case X86Local::MRM6r:
+ case X86Local::MRM7r:
+ filter = new ExtendedFilter(true, Form - X86Local::MRM0r);
+ break;
case X86Local::MRM0m:
case X86Local::MRM1m:
case X86Local::MRM2m:
@@ -1157,31 +1162,22 @@ void RecognizableInstr::emitDecodePath(DisassemblerTables &tables) const {
assert(filter && "Filter not set");
if (Form == X86Local::AddRegFrm) {
- if(Spec->modifierType != MODIFIER_MODRM) {
- assert(opcodeToSet < 0xf9 &&
- "Not enough room for all ADDREG_FRM operands");
-
- uint8_t currentOpcode;
-
- for (currentOpcode = opcodeToSet;
- currentOpcode < opcodeToSet + 8;
- ++currentOpcode)
- tables.setTableFields(opcodeType,
- insnContext(),
- currentOpcode,
- *filter,
- UID, Is32Bit, IgnoresVEX_L);
-
- Spec->modifierType = MODIFIER_OPCODE;
- Spec->modifierBase = opcodeToSet;
- } else {
- // modifierBase was set where MODIFIER_MODRM was set
+ assert(opcodeToSet < 0xf9 &&
+ "Not enough room for all ADDREG_FRM operands");
+
+ uint8_t currentOpcode;
+
+ for (currentOpcode = opcodeToSet;
+ currentOpcode < opcodeToSet + 8;
+ ++currentOpcode)
tables.setTableFields(opcodeType,
insnContext(),
- opcodeToSet,
+ currentOpcode,
*filter,
UID, Is32Bit, IgnoresVEX_L);
- }
+
+ Spec->modifierType = MODIFIER_OPCODE;
+ Spec->modifierBase = opcodeToSet;
} else {
tables.setTableFields(opcodeType,
insnContext(),
@@ -1341,6 +1337,7 @@ OperandEncoding RecognizableInstr::immediateEncodingFromString
OperandEncoding RecognizableInstr::rmRegisterEncodingFromString
(const std::string &s,
bool hasOpSizePrefix) {
+ ENCODING("RST", ENCODING_FP)
ENCODING("GR16", ENCODING_RM)
ENCODING("GR32", ENCODING_RM)
ENCODING("GR32orGR64", ENCODING_RM)
@@ -1493,7 +1490,6 @@ OperandEncoding RecognizableInstr::relocationEncodingFromString
OperandEncoding RecognizableInstr::opcodeModifierEncodingFromString
(const std::string &s,
bool hasOpSizePrefix) {
- ENCODING("RST", ENCODING_I)
ENCODING("GR32", ENCODING_Rv)
ENCODING("GR64", ENCODING_RO)
ENCODING("GR16", ENCODING_Rv)