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| author | David Woodhouse <dwmw2@infradead.org> | 2014-01-08 12:58:24 +0000 |
|---|---|---|
| committer | David Woodhouse <dwmw2@infradead.org> | 2014-01-08 12:58:24 +0000 |
| commit | aab59870a4f57f3d3246c858cb775766e38f0795 (patch) | |
| tree | efd5c5c5a8c4abba9970b576950e1072fe941865 /utils | |
| parent | 4f32ce2436d11f4de00db677f2c1d0a4022dbcfe (diff) | |
| download | llvm-aab59870a4f57f3d3246c858cb775766e38f0795.tar.gz llvm-aab59870a4f57f3d3246c858cb775766e38f0795.tar.bz2 llvm-aab59870a4f57f3d3246c858cb775766e38f0795.tar.xz | |
[x86] Fix MOV8ao8 et al for 16-bit mode, fix up disassembler to understand
It seems there is no separate instruction class for having AdSize *and*
OpSize bits set, which is required in order to disambiguate between all
these instructions. So add that to the disassembler.
Hm, perhaps we do need an AdSize16 bit after all?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198759 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils')
| -rw-r--r-- | utils/TableGen/X86DisassemblerTables.cpp | 5 | ||||
| -rw-r--r-- | utils/TableGen/X86RecognizableInstr.cpp | 2 |
2 files changed, 6 insertions, 1 deletions
diff --git a/utils/TableGen/X86DisassemblerTables.cpp b/utils/TableGen/X86DisassemblerTables.cpp index 6ef924a882..4c7066432a 100644 --- a/utils/TableGen/X86DisassemblerTables.cpp +++ b/utils/TableGen/X86DisassemblerTables.cpp @@ -94,8 +94,11 @@ static inline bool inheritsFrom(InstructionContext child, inheritsFrom(child, IC_64BIT_XD) || inheritsFrom(child, IC_64BIT_XS)); case IC_OPSIZE: - return inheritsFrom(child, IC_64BIT_OPSIZE); + return (inheritsFrom(child, IC_64BIT_OPSIZE) || + inheritsFrom(child, IC_OPSIZE_ADSIZE)); case IC_ADSIZE: + return inheritsFrom(child, IC_OPSIZE_ADSIZE); + case IC_OPSIZE_ADSIZE: case IC_64BIT_ADSIZE: return false; case IC_XD: diff --git a/utils/TableGen/X86RecognizableInstr.cpp b/utils/TableGen/X86RecognizableInstr.cpp index 1df0422437..ab97a5f543 100644 --- a/utils/TableGen/X86RecognizableInstr.cpp +++ b/utils/TableGen/X86RecognizableInstr.cpp @@ -456,6 +456,8 @@ InstructionContext RecognizableInstr::insnContext() const { else if (HasOpSizePrefix && (Prefix == X86Local::XS || Prefix == X86Local::T8XS)) insnContext = IC_XS_OPSIZE; + else if (HasOpSizePrefix && HasAdSizePrefix) + insnContext = IC_OPSIZE_ADSIZE; else if (HasOpSizePrefix) insnContext = IC_OPSIZE; else if (HasAdSizePrefix) |