summaryrefslogtreecommitdiff
path: root/utils
diff options
context:
space:
mode:
authorAndrew Trick <atrick@apple.com>2013-07-25 07:26:29 +0000
committerAndrew Trick <atrick@apple.com>2013-07-25 07:26:29 +0000
commitbba663e30a61b138c8f76632f8cacf00d7b0649a (patch)
tree01ece9fef3c659d73182e52c8df5863c40023331 /utils
parent5dca61397878a7207986455b42fa2117fbf78000 (diff)
downloadllvm-bba663e30a61b138c8f76632f8cacf00d7b0649a.tar.gz
llvm-bba663e30a61b138c8f76632f8cacf00d7b0649a.tar.bz2
llvm-bba663e30a61b138c8f76632f8cacf00d7b0649a.tar.xz
RegPressure: Order the "pressure sets" by number of regunits per set.
This lets heuristics easily pick the most important set to follow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187108 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils')
-rw-r--r--utils/TableGen/CodeGenRegisters.cpp27
-rw-r--r--utils/TableGen/CodeGenRegisters.h16
-rw-r--r--utils/TableGen/RegisterInfoEmitter.cpp18
3 files changed, 53 insertions, 8 deletions
diff --git a/utils/TableGen/CodeGenRegisters.cpp b/utils/TableGen/CodeGenRegisters.cpp
index d9f230ef1c..fcc9f3d350 100644
--- a/utils/TableGen/CodeGenRegisters.cpp
+++ b/utils/TableGen/CodeGenRegisters.cpp
@@ -956,7 +956,7 @@ CodeGenRegBank::CodeGenRegBank(RecordKeeper &Records) {
std::sort(TupRegsCopy.begin(), TupRegsCopy.end(), LessRecordRegister());
for (unsigned j = 0, je = TupRegsCopy.size(); j != je; ++j)
getReg((TupRegsCopy)[j]);
- TupRegsCopy.clear();
+ TupRegsCopy.clear();
}
// Now all the registers are known. Build the object graph of explicit
@@ -1620,6 +1620,16 @@ void CodeGenRegBank::computeRegUnitSets() {
}
}
+struct LessUnits {
+ const CodeGenRegBank &RegBank;
+ LessUnits(const CodeGenRegBank &RB): RegBank(RB) {}
+
+ bool operator()(unsigned ID1, unsigned ID2) {
+ return RegBank.getRegPressureSet(ID1).Units.size()
+ < RegBank.getRegPressureSet(ID2).Units.size();
+ }
+};
+
void CodeGenRegBank::computeDerivedInfo() {
computeComposites();
computeSubRegIndexLaneMasks();
@@ -1631,6 +1641,21 @@ void CodeGenRegBank::computeDerivedInfo() {
// Compute a unique set of RegUnitSets. One for each RegClass and inferred
// supersets for the union of overlapping sets.
computeRegUnitSets();
+
+ // Get the weight of each set.
+ for (unsigned Idx = 0, EndIdx = RegUnitSets.size(); Idx != EndIdx; ++Idx)
+ RegUnitSets[Idx].Weight = getRegUnitSetWeight(RegUnitSets[Idx].Units);
+
+ // Find the order of each set.
+ RegUnitSetOrder.reserve(RegUnitSets.size());
+ for (unsigned Idx = 0, EndIdx = RegUnitSets.size(); Idx != EndIdx; ++Idx)
+ RegUnitSetOrder.push_back(Idx);
+
+ std::stable_sort(RegUnitSetOrder.begin(), RegUnitSetOrder.end(),
+ LessUnits(*this));
+ for (unsigned Idx = 0, EndIdx = RegUnitSets.size(); Idx != EndIdx; ++Idx) {
+ RegUnitSets[RegUnitSetOrder[Idx]].Order = Idx;
+ }
}
//
diff --git a/utils/TableGen/CodeGenRegisters.h b/utils/TableGen/CodeGenRegisters.h
index 33f32b0812..37f75b4a48 100644
--- a/utils/TableGen/CodeGenRegisters.h
+++ b/utils/TableGen/CodeGenRegisters.h
@@ -433,6 +433,10 @@ namespace llvm {
std::string Name;
std::vector<unsigned> Units;
+ unsigned Weight; // Cache the sum of all unit weights.
+ unsigned Order; // Cache the sort key.
+
+ RegUnitSet() : Weight(0), Order(0) {}
};
// Base vector for identifying TopoSigs. The contents uniquely identify a
@@ -484,6 +488,9 @@ namespace llvm {
// already exist for a register class, we create a new entry in this vector.
std::vector<std::vector<unsigned> > RegClassUnitSets;
+ // Give each register unit set an order based on sorting criteria.
+ std::vector<unsigned> RegUnitSetOrder;
+
// Add RC to *2RC maps.
void addToMaps(CodeGenRegisterClass*);
@@ -622,6 +629,13 @@ namespace llvm {
return Weight;
}
+ unsigned getRegSetIDAt(unsigned Order) const {
+ return RegUnitSetOrder[Order];
+ }
+ const RegUnitSet &getRegSetAt(unsigned Order) const {
+ return RegUnitSets[RegUnitSetOrder[Order]];
+ }
+
// Increase a RegUnitWeight.
void increaseRegUnitWeight(unsigned RUID, unsigned Inc) {
getRegUnit(RUID).Weight += Inc;
@@ -631,7 +645,7 @@ namespace llvm {
unsigned getNumRegPressureSets() const { return RegUnitSets.size(); }
// Get a set of register unit IDs for a given dimension of pressure.
- RegUnitSet getRegPressureSet(unsigned Idx) const {
+ const RegUnitSet &getRegPressureSet(unsigned Idx) const {
return RegUnitSets[Idx];
}
diff --git a/utils/TableGen/RegisterInfoEmitter.cpp b/utils/TableGen/RegisterInfoEmitter.cpp
index 942163e77d..4d423e484f 100644
--- a/utils/TableGen/RegisterInfoEmitter.cpp
+++ b/utils/TableGen/RegisterInfoEmitter.cpp
@@ -223,7 +223,7 @@ EmitRegUnitPressure(raw_ostream &OS, const CodeGenRegBank &RegBank,
<< "getRegPressureSetName(unsigned Idx) const {\n"
<< " static const char *PressureNameTable[] = {\n";
for (unsigned i = 0; i < NumSets; ++i ) {
- OS << " \"" << RegBank.getRegPressureSet(i).Name << "\",\n";
+ OS << " \"" << RegBank.getRegSetAt(i).Name << "\",\n";
}
OS << " 0 };\n"
<< " return PressureNameTable[Idx];\n"
@@ -235,9 +235,9 @@ EmitRegUnitPressure(raw_ostream &OS, const CodeGenRegBank &RegBank,
<< "getRegPressureSetLimit(unsigned Idx) const {\n"
<< " static const unsigned PressureLimitTable[] = {\n";
for (unsigned i = 0; i < NumSets; ++i ) {
- const RegUnitSet &RegUnits = RegBank.getRegPressureSet(i);
- OS << " " << RegBank.getRegUnitSetWeight(RegUnits.Units)
- << ", \t// " << i << ": " << RegUnits.Name << "\n";
+ const RegUnitSet &RegUnits = RegBank.getRegSetAt(i);
+ OS << " " << RegUnits.Weight << ", \t// " << i << ": "
+ << RegUnits.Name << "\n";
}
OS << " 0 };\n"
<< " return PressureLimitTable[Idx];\n"
@@ -252,9 +252,15 @@ EmitRegUnitPressure(raw_ostream &OS, const CodeGenRegBank &RegBank,
for (unsigned i = 0, StartIdx = 0, e = NumRCUnitSets; i != e; ++i) {
RCSetStarts[i] = StartIdx;
ArrayRef<unsigned> PSetIDs = RegBank.getRCPressureSetIDs(i);
+ std::vector<unsigned> PSets;
+ PSets.reserve(PSetIDs.size());
for (ArrayRef<unsigned>::iterator PSetI = PSetIDs.begin(),
PSetE = PSetIDs.end(); PSetI != PSetE; ++PSetI) {
- OS << *PSetI << ", ";
+ PSets.push_back(RegBank.getRegPressureSet(*PSetI).Order);
+ }
+ std::sort(PSets.begin(), PSets.end());
+ for (unsigned i = 0, e = PSets.size(); i < e; ++i) {
+ OS << PSets[i] << ", ";
++StartIdx;
}
OS << "-1, \t// #" << RCSetStarts[i] << " ";
@@ -264,7 +270,7 @@ EmitRegUnitPressure(raw_ostream &OS, const CodeGenRegBank &RegBank,
OS << "inferred";
for (ArrayRef<unsigned>::iterator PSetI = PSetIDs.begin(),
PSetE = PSetIDs.end(); PSetI != PSetE; ++PSetI) {
- OS << "~" << RegBank.getRegPressureSet(*PSetI).Name;
+ OS << "~" << RegBank.getRegSetAt(*PSetI).Name;
}
}
OS << "\n ";