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| author | Jim Grosbach <grosbach@apple.com> | 2011-08-19 20:33:06 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-08-19 20:33:06 +0000 |
| commit | c68e927488819efd671207786baadce6cae7266c (patch) | |
| tree | 6f94f3449e9b0043cc9c5e9e2d04e9fed31d2284 /utils | |
| parent | 73a1c2cea181a4463effaab8612c78cf11b83336 (diff) | |
| download | llvm-c68e927488819efd671207786baadce6cae7266c.tar.gz llvm-c68e927488819efd671207786baadce6cae7266c.tar.bz2 llvm-c68e927488819efd671207786baadce6cae7266c.tar.xz | |
Allow non zero_reg explicit values for OptionalDefOperands in aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138073 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils')
| -rw-r--r-- | utils/TableGen/CodeGenInstruction.cpp | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/utils/TableGen/CodeGenInstruction.cpp b/utils/TableGen/CodeGenInstruction.cpp index 751326c8ad..b4f9d15071 100644 --- a/utils/TableGen/CodeGenInstruction.cpp +++ b/utils/TableGen/CodeGenInstruction.cpp @@ -424,6 +424,13 @@ bool CodeGenInstAlias::tryAliasOpMatch(DagInit *Result, unsigned AliasOpNo, // Handle explicit registers. if (ADI && ADI->getDef()->isSubClassOf("Register")) { + if (InstOpRec->isSubClassOf("OptionalDefOperand")) { + DagInit *DI = InstOpRec->getValueAsDag("MIOperandInfo"); + // The operand info should only have a single (register) entry. We + // want the register class of it. + InstOpRec = dynamic_cast<DefInit*>(DI->getArg(0))->getDef(); + } + if (InstOpRec->isSubClassOf("RegisterOperand")) InstOpRec = InstOpRec->getValueAsDef("RegClass"); |