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authorCraig Topper <craig.topper@gmail.com>2013-09-22 23:18:50 +0000
committerCraig Topper <craig.topper@gmail.com>2013-09-22 23:18:50 +0000
commitcf458e91da31339f62130a1456f01d359ad433cb (patch)
tree29e5d143f33267b7526ae81d28b7462caad0cdfb /utils
parentff96efee98f8a06e8fdf29d34843659932a83e95 (diff)
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Add missing index comments to the left side of the DAG ISel matcher table for each individual case of SwitchOpcode/Type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191181 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils')
-rw-r--r--utils/TableGen/DAGISelMatcherEmitter.cpp8
1 files changed, 6 insertions, 2 deletions
diff --git a/utils/TableGen/DAGISelMatcherEmitter.cpp b/utils/TableGen/DAGISelMatcherEmitter.cpp
index 93f84ce6e8..ba1b3585fb 100644
--- a/utils/TableGen/DAGISelMatcherEmitter.cpp
+++ b/utils/TableGen/DAGISelMatcherEmitter.cpp
@@ -315,10 +315,12 @@ EmitMatcher(const Matcher *N, unsigned Indent, unsigned CurrentIdx,
assert(ChildSize != 0 && "Should not have a zero-sized child!");
if (i != 0) {
+ if (!OmitComments)
+ OS << "/*" << CurrentIdx << "*/";
OS.PadToColumn(Indent*2);
if (!OmitComments)
- OS << (isa<SwitchOpcodeMatcher>(N) ?
- "/*SwitchOpcode*/ " : "/*SwitchType*/ ");
+ OS << (isa<SwitchOpcodeMatcher>(N) ?
+ "/*SwitchOpcode*/ " : "/*SwitchType*/ ");
}
// Emit the VBR.
@@ -340,6 +342,8 @@ EmitMatcher(const Matcher *N, unsigned Indent, unsigned CurrentIdx,
}
// Emit the final zero to terminate the switch.
+ if (!OmitComments)
+ OS << "/*" << CurrentIdx << "*/";
OS.PadToColumn(Indent*2) << "0, ";
if (!OmitComments)
OS << (isa<SwitchOpcodeMatcher>(N) ?