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authorOwen Anderson <resistor@mac.com>2012-09-11 23:32:17 +0000
committerOwen Anderson <resistor@mac.com>2012-09-11 23:32:17 +0000
commitd2c699706ceae4a118a8dcafbef73b85093e5390 (patch)
treee000ca9e32f391fae8690032e0b634b074ca9080 /utils
parent2a3fcb382ef43374327b7b7672fe1e1e178041da (diff)
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Compute a map from register names to registers, rather than scanning the list of registers every time we want to look up a register by name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163659 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils')
-rw-r--r--utils/TableGen/CodeGenRegisters.cpp6
-rw-r--r--utils/TableGen/CodeGenRegisters.h4
-rw-r--r--utils/TableGen/CodeGenTarget.cpp11
3 files changed, 15 insertions, 6 deletions
diff --git a/utils/TableGen/CodeGenRegisters.cpp b/utils/TableGen/CodeGenRegisters.cpp
index 931807ae44..f195b4e3fa 100644
--- a/utils/TableGen/CodeGenRegisters.cpp
+++ b/utils/TableGen/CodeGenRegisters.cpp
@@ -993,6 +993,12 @@ CodeGenRegBank::CodeGenRegBank(RecordKeeper &Records) {
for (unsigned i = 0, e = Registers.size(); i != e; ++i)
Registers[i]->buildObjectGraph(*this);
+ // Compute register name map.
+ for (unsigned i = 0, e = Registers.size(); i != e; ++i)
+ RegistersByName.GetOrCreateValue(
+ Registers[i]->TheDef->getValueAsString("AsmName"),
+ Registers[i]);
+
// Precompute all sub-register maps.
// This will create Composite entries for all inferred sub-register indices.
for (unsigned i = 0, e = Registers.size(); i != e; ++i)
diff --git a/utils/TableGen/CodeGenRegisters.h b/utils/TableGen/CodeGenRegisters.h
index bd748ca62e..e411074156 100644
--- a/utils/TableGen/CodeGenRegisters.h
+++ b/utils/TableGen/CodeGenRegisters.h
@@ -440,6 +440,7 @@ namespace llvm {
// Registers.
std::vector<CodeGenRegister*> Registers;
+ StringMap<CodeGenRegister*> RegistersByName;
DenseMap<Record*, CodeGenRegister*> Def2Reg;
unsigned NumNativeRegUnits;
@@ -522,6 +523,9 @@ namespace llvm {
}
const std::vector<CodeGenRegister*> &getRegisters() { return Registers; }
+ const StringMap<CodeGenRegister*> &getRegistersByName() {
+ return RegistersByName;
+ }
// Find a register from its Record def.
CodeGenRegister *getReg(Record*);
diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp
index fa31c9fb1b..6335cc5c4c 100644
--- a/utils/TableGen/CodeGenTarget.cpp
+++ b/utils/TableGen/CodeGenTarget.cpp
@@ -199,12 +199,11 @@ void CodeGenTarget::ReadRegAltNameIndices() const {
/// getRegisterByName - If there is a register with the specific AsmName,
/// return it.
const CodeGenRegister *CodeGenTarget::getRegisterByName(StringRef Name) const {
- const std::vector<CodeGenRegister*> &Regs = getRegBank().getRegisters();
- for (unsigned i = 0, e = Regs.size(); i != e; ++i)
- if (Regs[i]->TheDef->getValueAsString("AsmName") == Name)
- return Regs[i];
-
- return 0;
+ const StringMap<CodeGenRegister*> &Regs = getRegBank().getRegistersByName();
+ StringMap<CodeGenRegister*>::const_iterator I = Regs.find(Name);
+ if (I == Regs.end())
+ return 0;
+ return I->second;
}
std::vector<MVT::SimpleValueType> CodeGenTarget::