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authorCraig Topper <craig.topper@gmail.com>2014-01-02 17:28:14 +0000
committerCraig Topper <craig.topper@gmail.com>2014-01-02 17:28:14 +0000
commite625100c6a1a65e5739c2a3b2d2b5f758f5dcff6 (patch)
treedc6255b2bb101035f7aa6cc0509980e817332062 /utils
parent54ed186e1ba50b69130c31c0a967dfb51ad17e7b (diff)
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Mark all x86 Int_ and _Int patterns as isCodeGenOnly so the disassembler table builder doesn't need to string match them to exclude them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198323 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils')
-rw-r--r--utils/TableGen/X86RecognizableInstr.cpp4
1 files changed, 0 insertions, 4 deletions
diff --git a/utils/TableGen/X86RecognizableInstr.cpp b/utils/TableGen/X86RecognizableInstr.cpp
index 6e36854137..a4157d9725 100644
--- a/utils/TableGen/X86RecognizableInstr.cpp
+++ b/utils/TableGen/X86RecognizableInstr.cpp
@@ -503,10 +503,6 @@ RecognizableInstr::filter_ret RecognizableInstr::filter() const {
// Filter out artificial instructions but leave in the LOCK_PREFIX so it is
// printed as a separate "instruction".
- if (Name.find("_Int") != Name.npos ||
- Name.find("Int_") != Name.npos)
- return FILTER_STRONG;
-
// Filter out instructions with segment override prefixes.
// They're too messy to handle now and we'll special case them if needed.